ip2003nbsp International Rectifier Corp., ip2003nbsp Datasheet

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ip2003nbsp

Manufacturer Part Number
ip2003nbsp
Description
Synchronous Buck Multiphase Optimized Lga Power Block
Manufacturer
International Rectifier Corp.
Datasheet
ENABLE
ENABLE
PRDY
PRDY
SGND
SGND
PWM
PWM
V
V
DD
DD
Driver with
Driver with
MOSFET
MOSFET
dead time
dead time
control
control
V
V
V
V
PGND
PGND
IN
IN
SW
SW
Pin #
5, 7
1
2
3
4
6
8
Pin Name Pin Function
ENABLE
PRDY
PGND
PWM
V
V
V
DD
SW
IN
Supply voltage for the internal circuitry.
When set to logic level high, internal circuitry
of the device is enabled. When set to logic
level low, the PRDY pin is forced low, the
Control and Sychronous switches are turned
off, and the supply current is less than 10µA.
TTL-level input signal to MOSFET drivers.
Power Ready - This pin indicates the status of
ENABLE or V
low when ENABLE is logic low or when V
is less than 4.4V (typ.). When ENABLE is
logic high and V
this output is driven high. This output has a
10mA source and 1mA sink capability.
Power Ground - connection to the ground of
bulk and filter capacitors.
Switching Node - connection to the output
inductor.
Input voltage for the DC-DC converter.
DD
DD
. This output will be driven
is greater than 4.4V (typ.),
DD

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ip2003nbsp Summary of contents

Page 1

PRDY PRDY ENABLE ENABLE MOSFET MOSFET Driver with Driver with PWM PWM dead time dead time control control SGND SGND Pin # Pin Name Pin Function V ...

Page 2

Absolute Maximum Ratings: Parameter V to PGND PGND DD PWM to PGND Enable to PGND Output RMS Current Block Temperature Recommended Operating Conditions: Parameter Supply Voltage Input Voltage Output Voltage Output Current Operating Frequency Operating Duty Cycle ...

Page 3

12V V OUT = 1. 1MHz 12 T BLK = 125° 0.30µ Safe 36 Operating ...

Page 4

Input Voltage (V) 1. 12V 1.00 V OUT = 1.3V 0.95 I OUT = 40A 0. 0.30µH T BLK ...

Page 5

To calculate power loss for a given set of operating conditions, the following procedure should be followed: Determine the maximum current for each iP2003 and obtain the maximum power loss from Fig 1. Use the curves in Figs ...

Page 6

Average x I Average Average ...

Page 7

The PCB layout and bypassing issues have been addressed with the internal design of the iP2003. One of the most critical elements of proper PCB layout with iP2003 is the placement of the external input bypass capacitors and the routing ...

Page 8

C 11.00 2X [.433] 6 ORIENT AT ION CORNER VIEW S IDE VIEW L1 F1 PRDY V SW PWM PGND E1 ENABLE PGND BOT T ...

Page 9

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