hcs362 Microchip Technology Inc., hcs362 Datasheet - Page 10

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hcs362

Manufacturer Part Number
hcs362
Description
Keeloq Code Hopping Encoder
Manufacturer
Microchip Technology Inc.
Datasheet

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HCS362
3.1.1
The hopping portion is calculated by encrypting the
counter, discrimination value and function code with the
Encoder Key (KEY). The counter is a 16-bit counter.
The discrimination value is 10 bits long and there are 2
counter overflow bits (OVR) that are cleared when the
counter wraps to 0. The rest of the 32 bits are made up
of the function code also known as the button inputs.
3.1.2
The 32 bits of fixed code consist of 28 bits of the serial
number (SER) and another copy of the function code.
This can be changed to contain the whole 32-bit serial
number with the Extended Serial Number (XSER) con-
figuration option.
3.1.3
The status bits will always contain the output of the Low
Voltage detector (V
Check (CRC) bits (or TIME bits depending on CTSEL)
and the Button Queue information.
3.1.3.1
The output of the low voltage detector is transmitted
with each code word. If V
voltage, a logic ‘
detector is sampled before each code word is transmit-
ted.
3.1.3.2
The queue bits indicate a button combination was
pressed again within 2 s after releasing the previous
activation. Queuing or repeated pressing of the same
buttons (or button combination) is detected by the
HCS362 button debouncing circuitry.
The Queue bits are added as the last two bits of the
standard code word. The queue bits are a 2-bit counter
that does not wrap. The counter value starts at ‘
and is incremented, if a button is pushed within 2 s of
the previous button press. The current code word is ter-
minated when the buttons are queued. This allows
additional functionality for repeated button presses.
2 s period.
DS40189D-page 10
The button inputs are sampled every 6.4 ms during this
00
01
10
11
- first activation
- second activation
- third activation
- from fourth activation on
CODE HOPPING DATA
FIXED CODE DATA
STATUS INFORMATION
Low Voltage Detector Status (V
Button Queue Information (QUEUE)
1
’ will be transmitted. The output of the
LOW
), the Cyclic Redundancy
DD
drops below the selected
LOW
00b’
Preliminary
)
3.1.3.3
The CRC bits are calculated on the 65 previously trans-
mitted bits. The decoder can use the CRC bits to check
the data integrity before processing starts. The CRC
can detect all single bit errors and 66% of double bit
errors. The CRC is computed as follows:
EQUATION 3-1:
and
with
and Di
Note:
CRC 0
n
the nth transmission bit 0
The CRC may be wrong when the bat-
tery voltage is around either of the
V
because V
transmission, once for the CRC calcu-
lation (PWM is LOW) and once when
V
V
transmission which could lead to a dif-
ferent value for V
the CRC calculation and the transmis-
sion.
Work around: If the CRC is incorrect,
recalculate for the opposite value of
V
CRC 1
LOW
LOW
DD
LOW
n
Cyclic Redundancy Check (CRC)
+
1
tends to move slightly during a
.
=
is transmitted (PWM is HIGH).
trip points. This may happen
CRC 1 0
n
+
CRC 0
LOW
1
CRC Calculation
=
2002 Microchip Technology Inc.
CRC 0
is sampled twice each
0
n
LOW
=
Di
0
n
being used for
n
n
Di
64
CRC 1
n
n

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