dspic33fj128mc706at-i-pt Microchip Technology Inc., dspic33fj128mc706at-i-pt Datasheet - Page 241

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dspic33fj128mc706at-i-pt

Manufacturer Part Number
dspic33fj128mc706at-i-pt
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
REGISTER 21-29: CiTRBnDLC: ECAN BUFFER n DATA LENGTH CONTROL (n = 0, 1, ..., 31)
REGISTER 21-30: CiTRBnDm: ECAN BUFFER n DATA FIELD BYTE m (n = 0, 1, ..., 31; m = 0, 1, ..., 7)
© 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9
bit 8
bit 7-5
bit 4
bit 3-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-0
Note 1:
TRBnDm7
R/W-x
R/W-x
EID5
U-0
The Most Significant Byte contains byte (m + 1) of the buffer.
EID<5:0>: Extended Identifier bits
RTR: Remote Transmission Request bit
1 = Message will request remote transmission
0 = Normal message
RB1: Reserved Bit 1
User must set this bit to ‘0’ per CAN protocol.
Unimplemented: Read as ‘0’
RB0: Reserved Bit 0
User must set this bit to ‘0’ per CAN protocol.
DLC<3:0>: Data Length Code bits
TRnDm<7:0>: Data Field Buffer ‘n’ Byte ‘m’ bits
TRBnDm6
R/W-x
R/W-x
EID4
U-0
dsPIC33FJXXXMCX06A/X08A/X10A
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
TRBnDm5
R/W-x
R/W-x
EID3
U-0
TRBnDm4
R/W-x
R/W-x
R/W-x
EID2
RB0
Preliminary
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
TRBnDm3
R/W-x
R/W-x
R/W-x
DLC3
EID1
TRBnDm2
R/W-x
R/W-x
R/W-x
DLC2
EID0
x = Bit is unknown
x = Bit is unknown
TRBnDm1
R/W-x
R/W-x
R/W-x
DLC1
RTR
DS70594A-page 239
TRBnDm0
R/W-x
R/W-x
R/W-x
DLC0
RB1
bit 8
bit 0
bit 0
(1)

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