MC74ACT74DG ON Semiconductor, MC74ACT74DG Datasheet
MC74ACT74DG
Specifications of MC74ACT74DG
MC74ACT74DGOS
Related parts for MC74ACT74DG
MC74ACT74DG Summary of contents
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MC74AC74, MC74ACT74 Dual D−Type Positive Edge−Triggered Flip−Flop The MC74AC74/74ACT74 is a dual D−type flip−flop with Asynchronous Clear and Set inputs and complementary (Q,Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock ...
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TRUTH TABLE (Each Half) Inputs NOTE HIGH Voltage Level L ...
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RECOMMENDED OPERATING CONDITIONS Symbol V Supply Voltage Input Voltage, Output Voltage (Ref. to GND) in out Input Rise and Fall Time (Note ) ′AC Devices except Schmitt Inputs Input Rise ...
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... AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D) Symbol Parameter Maximum Clock f max Frequency Propagation Delay t PLH Propagation Delay t PHL Propagation Delay t PLH Propagation Delay t PHL *Voltage Range 3 3.3 V ±0.3 V. Voltage Range 5 5.0 V ±0.5 V. ...
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... CC Supply Current *All outputs loaded; thresholds on input associated with output under test. †Maximum test duration 2.0 ms, one output loaded at a time. AC CHARACTERISTICS (For Figures and Waveforms − See Section 3 of the ON Semiconductor FACT Data Book, DL138/D) Symbol Parameter Maximum Clock f max ...
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AC OPERATING REQUIREMENTS Symbol Parameter Set-up Time, HIGH or LOW Hold Time, HIGH or LOW Pulse ...
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... ORDERING INFORMATION Device MC74AC74N MC74AC74NG MC74ACT74N MC74ACT74NG MC74AC74D MC74AC74DG MC74AC74DR2 MC74AC74DR2G MC74ACT74D MC74ACT74DG MC74ACT74DR2 MC74ACT74DR2G MC74AC74DT MC74AC74DTR2 MC74AC74DTR2G MC74ACT74DT MC74ACT74DTR2 MC74ACT74DTR2G MC74AC74MEL MC74AC74MELG MC74ACT74MEL MC74ACT74MELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb− ...
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PDIP−14 SOIC−14 14 MC74AC74N AWLYYWWG AC74G AWLYWW 1 MC74ACT74N 14 AWLYYWWG ACT74G AWLYWW 1 (Note: Microdot may be in either location) MARKING DIAGRAMS TSSOP− ALYWG G ACT 74 ALYWG Assembly Location WL Wafer ...
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−T− SEATING PLANE 0.13 (0.005) PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE http://onsemi.com 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI ...
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... G −T− SEATING 14 PL PLANE 0.25 (0.010 14X 0.58 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SOIC−14 CASE 751A−03 ISSUE 0.25 (0.010 ...
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... S A −V− C 0.10 (0.004) −T− SEATING G D PLANE 14X 0.36 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE 0.25 (0.010) ...
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... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...