z8f0813 ZiLOG Semiconductor, z8f0813 Datasheet - Page 66

• Manufacturer Part Number: z8f0813
• Description: High-performance 8-bit Microcontrollers
• Manufacturer: ZiLOG Semiconductor

PS024314-0308
Caution:
Interrupt Vectors and Priority
Interrupt Assertion
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Interrupts are globally disabled by any of the following actions:
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The interrupt controller supports three levels of interrupt priority. Level 3 is the highest
priority, Level 2 is the second highest priority, and Level 1 is the lowest priority. If all
interrupts are enabled with identical interrupt priority (for example, all as Level 2
interrupts), the interrupt priority is assigned from highest to lowest as specified in
on page 54. Level 3 interrupts are always assigned higher priority than Level 2 interrupts
which, in turn, always are assigned higher priority than Level 1 interrupts. Within each
interrupt priority level (Level 1, Level 2, or Level 3), priority is assigned as specified in
Table
Watchdog Timer Oscillator Fail Trap, and Illegal Instruction Trap always have
highest (Level 3) priority.
Interrupt sources assert their interrupt requests for only a single system clock period
(single pulse). When the interrupt request is acknowledged by the eZ8 CPU, the
corresponding bit in the Interrupt Request register is cleared until the next interrupt
occurs. Writing a 0 to the corresponding bit in the Interrupt Request register likewise
clears the interrupt request.
The following coding style that clears bits in the Interrupt Request registers is not
recommended. All incoming interrupts received between execution of the first LDX
command and the final LDX command are lost.
Writing a 1 to the IRQE bit in the Interrupt Control register
Execution of a Disable Interrupt
eZ8 CPU acknowledgement of an interrupt service request from the interrupt controller
Writing a 0 to the IRQE bit in the Interrupt Control register
Reset
Execution of a
Illegal Instruction Trap
Primary Oscillator Fail Trap
Watchdog Timer Oscillator Fail Trap
33. Reset, Watchdog Timer interrupt (if enabled), Primary Oscillator Fail Trap,
Poor coding style that can result in lost interrupt requests:
LDX r0, IRQ0
AND r0, MASK
LDX IRQ0, r0
Trap
instruction
(DI
) instruction
Z8 Encore! XP
Product Specification
®
Interrupt Controller
F0823 Series
Table 33
56