z8f1601 ZiLOG Semiconductor, z8f1601 Datasheet - Page 103

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z8f1601

Manufacturer Part Number
z8f1601
Description
Z8 Encore!? Microcontroller With Flash Memory And 10-bit A/d Converter
Manufacturer
ZiLOG Semiconductor
Datasheet

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PS017609-0803
UART Interrupts
UART Baud Rate Generator
The UART features separate interrupts for the transmitter and the receiver. In addition,
when the UART primary functionality is disabled, the Baud Rate Generator can also func-
tion as a basic timer with interrupt capability.
Transmitter Interrupts
The transmitter generates an interrupt anytime the Transmit Data Register Empty bit
( TDRE ) is set to 1. This indicates that the transmitter is ready to accept new data for trans-
mission. Writing to the UART Transmit Data register clears the UART Transmit interrupt.
Receiver Interrupts
The receiver generates an interrupt when any of the following occurs:
Baud Rate Generator Interrupts
If the Baud Rate Generator (BRG) interrupt enable is set, the UART Receiver interrupt
asserts when the UART Baud Rate Generator reloads. This action allows the Baud Rate
Generator to function as an additional counter if the UART functionality is not employed.
The UART Baud Rate Generator creates a lower frequency baud rate clock for data trans-
mission. The input to the Baud Rate Generator is the system clock. The UARTx Baud Rate
High and Low Byte registers combine to create a 16-bit baud rate divisor value
(BRG[15:0]) that sets the data transmission rate (baud rate) of the UART. The UART data
rate is calculated using the following equation:
When the UART is disabled, the Baud Rate Generator can function as a basic 16-bit timer
with interrupt on time-out. To configure the Baud Rate Generator as a timer with interrupt
on time-out, complete the following procedure:
1. Disable the UART by clearing the REN and TEN bits in the UART Control 0 register
2. Load the desired 16-bit count value into the UART Baud Rate High and Low Byte
UART Data Rate (bits/s)
A data byte has been received and is available in the UART Receive Data register.
This interrupt can be disabled independent of the other receiver interrupt sources.
A break is received.
An overrun is detected.
A data framing error is detected.
to 0.
registers.
=
--------------------------------------------------------------------------------------------- -
16 UART Baud Rate Divisor Value
´
Z8F640x/Z8F480x/Z8F320x/Z8F240x/Z8F160x
System Clock Frequency (Hz)
Z8 Encore!
UART
®
85

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