mc1670 ETC-unknow, mc1670 Datasheet

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mc1670

Manufacturer Part Number
mc1670
Description
Suffix Ceramic Package Case 620-10
Manufacturer
ETC-unknow
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mc1670L
Manufacturer:
MOTOROLA
Quantity:
8
Part Number:
mc1670L
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Master-Slave Flip-Flop
shape of the clock waveform, since only the voltage levels at the clock inputs
control the transfer of information from data input (D) to output.
affects only the “Master” portion of the flip-flop. The data present in the “Master”
is transferred to the “Slave” when clock inputs (C1 “OR” C2) are taken from a
low to a high level. In other words, the output state of the flip-flop changes on the
positive transition of the clock pulse.
disabled.
Power Dissipation = 220 mW typ (No Load)
f Tog = 350 MHz typ
ELECTRICAL CHARACTERISTICS
3/93
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Power Supply Drain Current
Input Current
Switching Times
Motorola, Inc. 1996
Set, Reset
Clock
Data
Propagation Delay
Rise Time (10% to 90%)
Fall Time (10% to 90%)
Setup Time
Hold Time
Toggle Frequency
Master slave construction renders the MC1670 relatively insensitive to the
When both clock inputs (C1 and C2) are in the low state, the data input
While either C1 “OR” C2 is in the high state, the “Master” (and data input) is
Asynchronous Set (S) and Reset (R) override Clock (C) and Data (D) inputs.
Ch
Characteristic
i i
ND = Not Defined
C = C1 + C2
R
H
H
L
L
L
L
L
L
L
S
Symbol
t H“1”
t H“0”
t S“1”
t S“0”
f Tog
I inH
t pd
t +
t –
I E
S
H
H
L
L
L
L
L
L
L
b l
TRUTH TABLE
Min
270
1.0
0.9
0.5
–30 C
D
X
X
X
H
H
H
L
L
L
4–356
Max
2.7
2.7
2.1
C
X
X
X
L
H
H
L
Min
300
1.1
1.0
0.6
0.4
0.5
0.3
0.5
+ 25 C
Q n+1
Max
550
250
270
N.D.
2.5
2.5
1.9
48
Q n
Q n
Q n
Q n
H
H
L
L
Min
270
1.1
1.0
0.6
+ 85 C
Max
2.9
2.9
2.3
mAdc
MHz
U i
Unit
Adc
ns
ns
ns
ns
ns
REV 5
11
7
4
5
9
CLOCK 1
RESET
C1
C2
D
S
R
V CC1
SET
V EE
NC
Q
Q
MC1670
PIN ASSIGNMENT
LOGIC DIAGRAM
1
2
3
4
5
6
7
8
CERAMIC PACKAGE
CASE 620–10
16
15
14
13
12
10
11
L SUFFIX
9
V CC1 = Pin 1
V CC2 = Pin 16
V EE = Pin 8
V CC2
NC
NC
NC
NC
DATA
NC
CLOCK 2
Q
Q
2
3

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mc1670 Summary of contents

Page 1

... MOTOROLA SEMICONDUCTOR TECHNICAL DATA Master-Slave Flip-Flop Master slave construction renders the MC1670 relatively insensitive to the shape of the clock waveform, since only the voltage levels at the clock inputs control the transfer of information from data input (D) to output. When both clock inputs (C1 and C2) are in the low state, the data input affects only the “ ...

Page 2

... Note: All power supply and logic levels are shown shifted 2.0 volts positive. MECL Data DL122 — Rev +1.11 V +0.71 V BIAS +0.31 V The maximum toggle frequency of the MC1670 has been exceeded when either: 1. The output peak-to-peak voltage swing falls below 600 millivolts The device ceases to toggle (divide by two). 600 MV MIN ...

Page 3

... MC1670 FIGURE 4 — MINIMUM “DOWN TIME” TO CLOCK MOTOROLA OUTPUT LOAD = 50 CLOCK 1.0 NS/DIV. FIGURE 5 — MINIMUM “UP TIME” TO CLOCK OUTPUT LOAD = CLOCK 1.0 NS/DIV. 4–358 MECL Data DL122 — Rev 6 ...

Page 4

... MAX MIN MAX A 0.750 0.785 19.05 19.93 B 0.240 0.295 6.10 7.49 C ––– 0.200 ––– 5.08 D 0.015 0.020 0.39 0.50 E 0.050 BSC 1.27 BSC F 0.055 0.065 1.40 1.65 G 0.100 BSC 2.54 BSC H 0.008 0.015 0.21 0.38 K 0.125 0.170 3.18 4.31 L 0.300 BSC 7.62 BSC 0.020 0.040 0.51 1.01 *MC1670/D* MC1670/D MOTOROLA ...

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