ata5749-6dq ATMEL Corporation, ata5749-6dq Datasheet
ata5749-6dq
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ata5749-6dq Summary of contents
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... Wide Tolerance Crystal Possible with PLL Software Compensation 1. Description The ATA5749 is a fractional-N-PLL transmitter IC for 300 MHz to 450 MHz operation and is especially targeted for Tire Pressure Sensor Gauges, Remote Keyless Entry, and Passive Entry and other automotive applications. It operates at data rates kbit/s Manchester for ASK and FSK with a typical 5 ...
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... Figure 1-1. Block Diagram CLK SDIN_TXDIN SCK ANT2 ANT1 ATA5749 [Preliminary] 2 ATA5749 1 XTO_RDY CLK_DRV 1 XTO Signal Fractional-N-PLL CLK_ON DIV_CNTRL FSK_mod 2 FREQ[0:14] FSEP[0:7] Frac. Digital Control and 433_N315 Registers 3 ASK_mod PFD PWR[0: VCO 10 EN Power up/down 9 GND Div XTO1 ...
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... ATA5749 SCK 3 ANT2 4 ANT1 5 Function CLK output Serial bus data input and TX data input Serial bus clock input Antenna interface Antenna interface Crystal/C connection LOAD2 Crystal/C connection LOAD1 Supply input Supply GND Enable input ATA5749 [Preliminary GND XTO1 6 XTO2 3 ...
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... Functional Description 3.1 Fractional-N PLL The ATA5749 block diagram is shown in determined by the contents of a 32-bit configuration register. The 15-bit value FREQ is used with the 1-bit 434_N315 flag to determine the RF carrier frequency. This results in a user-selectable frequency step size of 793 Hz (with 13.000 MHz crystal). With this level of resolution possi- ble to compensate for crystal tolerance by adjusting the value of FREQ accordingly ...
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... HIGH switch on the upper FSK-frequency. 9128D–RKE–01/09 Class C Power Amplifier Output V ANT1 ANT2 I = (PWR[0:3]) Pulse ANT1 L1 Power Meter ANT1 LOPT ANT2 is calibrated during ATA5749 production to about Pulse ATA5749 [Preliminary ANT2 4 can be programmed with the 4-bit value in Pulse Figure 3-1. 5 ...
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... XTO_RDY signal so that the first period of the CLK output is always a full period (no CLK output spike at activation). To lower overall current consumption possible to power down the entire chip except for the crystal oscillator block. This can be achieved when the CLK_ONLY is “set”. ATA5749 [Preliminary] 6 XTO12_START 2.5 mm crystals). ...
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... Fractional-N-PLL CLK_ON DIV_CNTRL FSK_mod 2 FREQ[0:14] FSEP[0:7] Digital Control and 433_N315 Registers 3 ASK_mod SCK PWR[0: shows the typical application circuit. For C6, the supply-voltage blocking capacitor, ATA5749 [Preliminary] ATA5749 10 EN Power up/down 9 GND Frac. Div. 8 PFD XTO1 LP XTO (FOX) 6 XTO2 ...
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... The maximum output power is achieved by using load impedances according to Table 4-2 on page 9 ance seen from the ATA5749 ANT1, ANT2 into the matching network. This is not the output impedance of the IC but essentially the peak voltage divided by the peak current with some addi- tional parasitic effects (Cpar). ...
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... ATA5749 [Preliminary] are Cpar LOPT LOPT ( ) ( ) (pF) 2950 110 + 540j 0.9 1940 150 + 520j 0.9 1550 190 + 520j 0.9 1250 220 + 480j 0.9 1000 240 + 430j 0.9 730 280 + 360j 0.9 580 290 + 300j 0.9 460 290 + 290j 0.9 350 280 + 225j 0 ...
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... Figure 4-3. Figure 4-4. ATA5749 [Preliminary] 10 Typical Measured Output Power -40 27 Temperature [ Typical Current Consumption I at Port - 3.6V, PWR[0:15] = 15] = 3.0V, PWR[0:15 1.9V, PWR[0:15 3.6V, PWR[0:15 3.0V, PWR[0:15 1.9V, PWR[0:15 ˚ ...
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... Pulling of Frequency due to ASK Modulation (PA Switching) The switching effect on VCO frequency in ASK Mode is very low if a correct PCB layout and decoupling is used. Therefore, power ramping is not needed to achieve a clean spectrum (see Figure Figure 5-1. 9128D–RKE–01/09 5-1). Typical RF Spectrum of 40 kHz ASK Modulation at Pout = 12.5 dBm ATA5749 [Preliminary] 11 ...
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... FREQ FSEP FSEP FSEP FSEP [0] [7] [6] [5] [4] FSK Shift = FSEP[0..7] FSEP[0] + ... + FSEP[7] Table 6-2. Name CLK_ONLY S434_N315 FREQ[0:14] FSEP[0:7] DIV_CNTRL PWR[0:3] ASK_NFSK CLK_ON ATA5749 [Preliminary] 12 Table 6 FREQ FREQ FREQ FREQ [11] [10] [9] [8] Frequency Adjust = FREQ[0..14] FREQ[ FREQ[ FREQ[2] + ... + FREQ[14 ...
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... OFF_ Start_Up_ Mode Mode_1 9128D–RKE–01/09 T SCK_High T SCK_Cycle T SCK_Low T Hold MSB X MSB-1 XTO T XTO 32-bit Configuration Start_Up_ Mode_2 ATA5749 [Preliminary] Figure 6-1. Note that the maximum T SDIN_TXDIN_setup X TX-Data PLL FSK; TX_Mode2 TX_ OFF_Mode ASK: Mode1 TX_Mode1 and TX_Mode2 Figure 13 ...
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... SPI bus as shown in After data transmission, the device can be switched back to OFF_Mode by asserting EN, SCK, and SDIN_TXDIN to a LOW state. An example of programming from the Reset_Register_Mode is shown in ATA5749 [Preliminary] 14 shows the combination with slow programming and a faster ramp up of XTO. A dia- Figure 6-5 Table 6-3 on page 15 ...
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... Power up/down; XTO; digital control; fractional-N-PLL; CLK_DRV Power up/down; XTO; digital control; CLK_DRV Power up/down; XTO; digital control; CLK_DRV Power up/down; XTO; digital control; CLK_DRV Power up/down; XTO; digital control; CLK_DRV 1. Only if activated with CLK_ON = HIGH ATA5749 [Preliminary] T PLL 32-bit TX_ Configuration Data FSK ...
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... XTO cycles (T PLL register programmed and XTO_RDY = 'High' To transition from one state to another, only the conditions next to the transition arrows must be fulfilled. No additional settings are required. ATA5749 [Preliminary 'High' SDIN_TXDIN = 'Low 'Low' SDIN_TXDIN = 'Low' CLK_Only = 'Low' register parity programmed ...
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... ESD Protection Circuit CLK SCK EN Symbol tot stg Tamb1 < 0.25V or Tamb2 < 0.25V HBM HBM MM MM CDM Symbol R thJA ATA5749 [Preliminary] ANT1 ANT2 XTO2 XTO1 Min. Max. –0.3 +4.0 100 150 –55 +125 –40 +125 175 –4 +4 –2 +2 –200 +200 –150 +150 750 ...
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... PWR[0: 2.1 TX_Mode2 Z LOAD 4-1 and *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter Note: (Pin Number) in brackets mean they are measured matched to 50 according to and optimum load impedances according to ATA5749 [Preliminary 3.0V and T S Pin +25° +85°C +125°C 3. ...
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... Table LOPT Table 4-2 on page –40°C to +125° (5) OUT_x OUT < 2 < Table 4-1 and Table 4-2 on page 9 ATA5749 [Preliminary] = 13.0000 MHz, XTO = 25°C amb Symbol Min. Typ. Max. I 5.4 6.7 S_P1 I 7.0 S_P1 P 4.0 5.5 7.0 OUT_2 I 7.3 8.8 ...
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... At 1 MHz 4.5 noise (VCO MHz *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter Note: (Pin Number) in brackets mean they are measured matched to 50 according to and optimum load impedances according to ATA5749 [Preliminary 3.0V and T S Pin < LOAD = 13 ...
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... XTO ± XTO ±f XTO ± XTO ± f XTO 5 ± f XTO 5 5 XTO XTO Table 4-1 and Table 4-2 on page 9 ATA5749 [Preliminary] = 13.0000 MHz, XTO = 25°C amb Symbol Min. Typ. Max MOD_FSK MOD_ASK –47 Spur –47 –60 Spur –47 – ...
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... Timing Characteristics (ATA5749 1.9V to 3.6V –40°C to +125°C. Typical values are given amb (pin 9). Parameters where crystal relevant parameters are important correspond to a crystal with C and R 170 unless otherwise specified. M No. Parameters Test Conditions EN set-up time to rising 1.1 edge of SCK SDIN_TXDIN set-up time 1 ...
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... Internal pull-down resistor “Low” level input voltage 1.3 EN input “High” level input voltage Internal pull-down resistor *) Type means 100% tested 100% correlation tested Characterized on samples Design parameter 9128D–RKE–01/09 ATA5749 [Preliminary] = 3.0V and T S Pin Symbol Min. Typ ...
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... Ordering Information Extended Type Number ATA5749-6DQ 14. Package Information Package: TSSOP 10 (acc. to JEDEC Standard MO-187) Dimensions in mm Not indicated tolerances ± 0.05 0.5 nom 0 nom. ATA5749 [Preliminary] 24 Package MSOP10 3 ±0.1 0. Remarks - 3 ±0.1 3.8 ±0.3 4.9 ±0.1 technical drawings according to DIN specifications Drawing-No ...
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... Revision No. 9128D-RKE-01/09 9128C-RKE-10/08 9128B-RKE-08/08 9128D–RKE–01/09 ATA5749 [Preliminary] History Features on page 1 changed Section 8 “Absolute Maximum Ratings” on page 17 changed Features on page 1 changed Section 8 “Absolute Maximum Ratings” on page 17 changed Section 12 “Digital Port Characteristics” on page 23 changed ...
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... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. © 2009 Atmel Corporation. All rights reserved. Atmel marks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. International Atmel Asia Atmel Europe Unit 1-5 & ...