ICS1531-140 Integrated Circuit System, ICS1531-140 Datasheet
ICS1531-140
Related parts for ICS1531-140
ICS1531-140 Summary of contents
Page 1
... Either the internal pixel clock can be used as a capture clock input to the analog-to-digital converters or an external clock input can be used. The ICS1531 provides either one or two 24-bit pixels per clock. An ADCSYNC output pin provides recovered HSYNC from the pixel clock phase-locked-loop (PLL) divider chain output, which can be used to synchronize display enable output ...
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... Clamp, Video Amplifier, and Analog-to-Digital Circuits (Condition RGB Inputs) Clamp Circuits (Adjust RGB Inputs to ADC Range) To properly digitize incoming RGB analog signals, the ICS1531 must adjust the signals to the range of the ADC. This adjustment is done by clamping the signal, which both (1) establishes a bottom voltage limit and (2) offsets the signal to align the black level of the incoming signal with the bottom voltage limit ...
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... In the case of the ICS1531, when its PLL is locked it locks a pixel clock output to that of an HSYNC signal from input video. ...
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... For general-purpose outputs, the ICS1531 provides three programmable pins, PSEL3, PSEL2, PSEL1. Board Manufacture and Layout For information on how to manufacture and lay out a printed circuit board so the ICS1531 operates at peak performance, on the ICS website see the 1531LG Layout Guide. ICS1531PB Rev D 3/17/2000 ...
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... ICS1531 Product Brief - Preliminary Pin Diagram 1 VSS 2 TRESET 3 VSS VSS 6 HSYNC 7 VSSSUB 8 PSEL1 9 PSEL2 10 PSEL3 VSS(TEST) 13 VSSSUB 14 Reserved 15 ARED 16 VRTR 17 VRB AGRN 20 VRTG 21 Reserved 22 ABLUE 23 VRTB 24 VDDAADC 25 VSSAADC 26 VSSAADC 27 VDDAADC 28 CLAMP 29 VDDQADC 30 BB7 31 BB6 32 BB5 33 BB4 34 BB3 35 BB2 ...
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... I Test Reset. When the ICS1531: • Is not in Test mode, this pin has no effect. • Test mode, this pin acts as a reset that sets the ICS1531 to an initial known state. Pixel Data Pins Table 3. Pixel Data Pins Pin Name Pin Type ...
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... Industry-Standard 2-Wire Serial Bus Pins Pin Name Pin Type SBADR I Serial Bus Address: Determines the address for the ICS1531 industry-standard 2-wire serial bus. SCL I Serial Clock: The clock for the interface to the industry-standard 2-wire serial bus. 5-V tolerant. SDA I/O Serial Data: Connects to the data pin for an industry-standard 2-wire serial bus. 5-V tolerant. ...
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... Do not connect these pins. Connecting them can affect the performance and operation of the ICS1531 and future members of the ICS153X family. Reserved Reserved: For use by ICS. Reserved pins must not be connected. Connecting them can affect the performance and operation of the ICS1531and future members of the ICS153X family. ICS1531PB Rev D 3/17/2000 Pin Description Pin Description Copyright © ...