lan7500 Standard Microsystems Corp., lan7500 Datasheet - Page 16

• Manufacturer Part Number: lan7500
• Description: Hi-speed Usb 2.0 To 10/100/1000 Ethernet Controller
• Manufacturer: Standard Microsystems Corp.

Revision 1.0 (11-01-10)
NUM PINS
NUM PINS
1
1
1
1
1
4
6
1
4
System Reset
Power Supply
Power Supply
+3.3V Analog
Channels 0-3
VBUS Power
+1.2V Power
+1.2V Power
Supply Input
Supply Input
Supply Input
+3.3V/+2.5V
Digital Core
PME Clear
+1.2V Port
I/O Power
Upstream
Switching
Regulator
USB PLL
Input For
Ethernet
NAME
Detect
NAME
Mode
Input
Test
Table 2.7 I/O Power Pins, Core Power Pins, and Ground Pad
VDD12USBPLL
VDD12CORE
PME_CLEAR
VBUS_DET
SW_MODE
VDDVARIO
SYMBOL
SYMBOL
nRESET
VDD33A
VDD12A
TEST
Table 2.6 Miscellaneous Pins
DATASHEET
BUFFER
BUFFER
TYPE
IS_5V
TYPE
(PU)
(PU)
(PD)
VO6
VIS
VIS
P
P
P
P
P
16
-
This active-low pin allows external hardware to
reset the device.
Note:
This pin may serve as the PME_CLEAR input
when PME mode of operation is in effect. Refer
to
additional information.
Detects state of upstream bus power.
For bus powered operation, this pin must be tied
to VDD33A.
For self powered operation, refer to the
LAN7500/LAN7500i reference schematics.
This pin must always be connected to VSS for
proper operation.
When asserted, this pin places the external
switching regulator into power saving mode.
Note:
Refer to
page 36
schematics for connection information.
Refer to
page 36
schematics for connection information.
Refer to
page 36
schematics for connection information.
Refer to
page 36
schematics for additional connection information.
Refer to
page 36
schematics for additional connection information.
Chapter 4, "PME Operation," on page 30
Hi-Speed USB 2.0 to 10/100/1000 Ethernet Controller
and the LAN7500/LAN7500i reference
and the LAN7500/LAN7500i reference
and the LAN7500/LAN7500i reference
and the LAN7500/LAN7500i reference
and the LAN7500/LAN7500i reference
Chapter 6, "Application Diagrams," on
Chapter 6, "Application Diagrams," on
Chapter 6, "Application Diagrams," on
Chapter 6, "Application Diagrams," on
Chapter 6, "Application Diagrams," on
Assertion of nRESET is required
following power-on.
The
SW_MODE_SEL
Flags 1
and when it is asserted, respectively.
SW_MODE_POL
DESCRIPTION
DESCRIPTION
control the polarity of the pin
SMSC LAN7500/LAN7500i
bits of
and
Configuration
Datasheet
for