pex8616 PLX, pex8616 Datasheet

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pex8616

Manufacturer Part Number
pex8616
Description
16-lane, 4-port Pci Express Gen 2 5.0 Gt/s Switch, 19 X 19mm Fcbga
Manufacturer
PLX
Datasheet

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Features
o 16-lane, 4-port PCIe Gen 2 switch
o 19 x 19mm
o Typical Power: 2.2 Watts
o Standards Compliant
o High Performance
o Flexible Configuration
o Dual-Host & Fail-Over Support
o Quality of Service (QoS)
o Reliability, Availability, Serviceability
PEX 8616 General Features
PEX 8616 Key Features
- Integrated 5.0 GT/s SerDes
- PCI Express Base Specification, r2.0
- PCI Power Management Spec, r1.2
- Microsoft Vista Compliant
- Supports Access Control Services
- Dynamic link-width control
- Dynamic SerDes speed control
- Non-blocking switch fabric
- Full line rate on all ports
- Packet Cut-Thru with 170ns max packet
- 2KB Max Payload Size
- Read Pacing (bandwidth throttling)
- Dual Cast
- Ports configurable as x1, x2, x4, x8
- Registers configurable with strapping
- Lane and polarity reversal
- Compatible with PCIe 1.0a PM
- Configurable Non-Transparent port
- Moveable upstream port
- Crosslink port capability
- Eight traffic classes per port
- Weighted round-robin source
- 2 Hot-Plug Ports with native HP Signals
- All ports Hot-Plug capable thru I
- ECRC and Poison bit support
- Data Path parity
- Memory (RAM) Error Correction
- INTA# and FATAL_ERR# signals
- Advanced Error Reporting
- Port Status bits and GPIO available
- Per port error diagnostics
- Performance Monitoring
- JTAG AC/DC boundary scan
(backwards compatible w/ PCIe r1.0a/1.1)
latency (x4 to x4)
pins, EEPROM, I
port arbitration
(Hot-Plug Controller on every port)
• Per port payload & header counters
Version 0.95 2008
2
, 324-pin FCBGA package
2
C, or host software
2
C
The ExpressLane
capability enabling users to add scalable high bandwidth, non-blocking
interconnection to a wide variety of applications including
workstations, storage systems, communications platforms,
embedded systems, and intelligent I/O modules. The PEX 8616 is
well suited for fan-out, aggregation, and peer-to-peer applications.
High Performance & Low Packet Latency
The PEX 8616 architecture supports packet cut-thru with a maximum
latency of 170ns (x4 to x4). This, combined with large packet memory and
non-blocking internal switch architecture, provides full line rate on all ports
for performance-hungry applications such as servers and switch fabrics.
The low latency enables applications to achieve high throughput and
performance. In addition to low latency, the device supports a max payload
size of 2048 bytes, enabling the user to achieve even higher throughput.
Data Integrity
The PEX 8616 provides end-to-end CRC (ECRC) protection and Poison bit
support to enable designs that require end-to-end data integrity. PLX also
supports data path parity and memory (RAM) error correction as packets
pass through the switch.
Flexible Register & Port Configuration
x8. Flexible buffer allocation, along with the device's flexible packet flow
control, maximizes throughput for applications where more traffic flows in
the downstream, rather than upstream, direction. Any port can be designated
as the upstream port, which can be changed dynamically. The PEX 8616 also
provides several ways to
configure its registers.
The device can be
configured through
strapping pins, I
interface, host software,
or an optional serial
EEPROM. This allows for
easy debug during the
development phase,
performance monitoring
during the operation
phase, and driver or
software upgrade. Figure
1 shows some of the
PEX 8616’s common port
configurations.
The PEX 8616’s 4 ports can be configured to lane widths of x1, x2, x4, or
PCIe Gen 2, 5.0GT/s 16-lane, 4-port Switch
PEX 8616
2
C
TM
PEX 8616 device offers PCI Express switching
Figure 1. Common Port Configurations
x4
x4
x4
x4
PEX 8616
PEX 8616
PEX 8616
PEX 8616
PEX 8616
PEX 8616
PEX 8616
PEX 8616
PEX 8616
PEX 8616
PEX 8616
PEX 8616
x4 x4
x4 x4
x2 x2
x2 x2
x4
x4
x4
x4
PEX 8616
PEX 8616
PEX 8616
x4
x4
PEX 8616
PEX 8616
PEX 8616
PEX 8616
PEX 8616
PEX 8616
PEX 8616
x8
NT
x8
x8
x8
x4
x4

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pex8616 Summary of contents

Page 1

... Data Integrity The PEX 8616 provides end-to-end CRC (ECRC) protection and Poison bit support to enable designs that require end-to-end data integrity. PLX also supports data path parity and memory (RAM) error correction as packets pass through the switch. ...

Page 2

... Secondary Host Secondary Host Secondary Host Secondary Host Secondary Host Secondary Host Secondary Host Secondary Host strength in a system. The PLX SerDes implementation CPU CPU CPU CPU CPU CPU CPU CPU supports four levels of power – off, low, typical, and high ...

Page 3

CPU CPU CPU CPU CPU CPU CPU CPU Chipset Chipset Chipset Chipset x4 x16 Endpoint Endpoint Endpoint Endpoint x16 PEX 8616 PEX 8616 PEX 8616 PEX 8616 x4 Endpoint Endpoint Endpoint Endpoint x4 PCIe Gen1 or PCIe Gen2 slots Figure ...

Page 4

... PEX 8616RDK Product Brief. Product Ordering Information Part Number Description PEX8616-BA50BC 16-Lane, 4-Port PCI Express Switch (19x19mm PEX8616-BA50BC F 16-Lane, 4-Port PCI Express Switch, Pb-Free (19x19mm PEX8616-BA RDK PEX 8616 Rapid Development Kit Please visit the PLX Web site at http://www.plxtech.com 2 ) for sampling. 2 ...

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