pex8647 PLX, pex8647 Datasheet

pex8647

Manufacturer Part Number

pex8647

Description

Pcie Gen2, 5.0gt/s 48-lane, 3-port Pcie Switch

Manufacturer

PLX

Datasheet

1.PEX8647.pdf (3 pages)

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Bonase Electronics (HK) Co., Limited

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pex8647-AB50BC F

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Company:

Meier Automation Equipment Co., Limited

Part Number:

pex8647-AB50BCF

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PLX

Quantity:

20 000

Company:

Bonase Electronics (HK) Co., Limited

Part Number:

pex8647-BB50BC

Manufacturer:

PLX

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Part Number:

pex8647-BB50RBC F

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Features

o 27 x 27mm

o Typical Power: 2.8 Watts

o Standards Compliant

o High Performance

o Flexible Configuration

o Quality of Service (QoS)

o Reliability, Availability, Serviceability

PEX 8647 Vitals

PEX 8647 Key Features

- 48-lane, 3-port PCIe Gen2 switch

- PCI Express Base Specification, r2.0

- PCI Power Management Spec, r1.2

- Microsoft Vista Compliant

- Supports Access Control Services

- Dynamic link-width control

- Dynamic SerDes speed control

- Non-blocking switch fabric

- Full line rate on all ports

- Packet Cut-Thru with 140ns max packet

- 2KB Max Payload Size

- Read Pacing (bandwidth throttling)

- Dual Cast

- Registers configurable with strapping

- Lane and polarity reversal

- Selectable upstream port

- Compatible with PCIe 1.0a PM

- Eight traffic classes per port

- Weighted round-robin source

- ECRC and Poison bit support

- Data Path parity

- Memory (RAM) Error Correction

- INTA# and FATAL_ERR# signals

- Advanced Error Reporting

- Port Status bits and GPIO available

- Per port error diagnostics

- Performance Monitoring

Integrated 5.0 GT/s SerDes

(backwards compatible w/ PCIe r1.0a/1.1)

latency (x16 to x16)

pins, EEPROM, I

port arbitration

• Per port payload & header counters

Version 1.0 2009

, 676-pin FCBGA package

C, or host software

The ExpressLane

capability enabling users to add scalable high bandwidth, non-blocking

interconnection to high-end graphics applications. The PEX 8647 is

optimized to support high-resolution graphics while supporting peer-

to-peer traffic and dual-cast for maximum performance.

High Performance & Low Packet Latency

The PEX 8647 architecture supports packet cut-thru with a maximum

latency of 140ns (x16 to x16). This, combined with large packet memory

and non-blocking internal switch architecture, provides full line rate on all

ports for performance-hungry graphics applications. The low latency enables

applications to achieve high throughput and performance. In addition to low

latency, the device supports a packet payload size of up to 2048 bytes,

enabling the user to achieve even higher throughput. Flexible buffer

allocation, along with the device's flexible packet flow control, maximizes

throughput for graphics applications where more traffic flows in the

downstream, rather than upstream, direction.

Data Integrity

The PEX 8647 provides end-to-end CRC (ECRC) protection and Poison bit

support to enable designs that require end-to-end data integrity. PLX also

supports data path parity and memory (RAM) error correction as packets

pass through the switch.

The PEX 8647 provides several ways to configure its operations. The device

can be configured through strapping pins, I

cycles, or an optional serial EEPROM. This allows for easy debug during the

development phase, performance monitoring during the operation phase, and

driver or software upgrade.

Dual Cast

The PEX 8647 supports Dual Cast, a feature which allows for the copying of

data (e.g. packets) from one ingress port to two egress ports allowing for

higher performance in dual-graphics applications.

Read Pacing

The Read Pacing feature allows users to throttle the amount of read requests

being made by downstream devices. When a downstream device requests

several long reads back-to-back, the Root Complex gets tied up in serving

this downstream port. If this port has a narrow link and is therefore slow in

receiving these read packets from the Root Complex, then other downstream

ports may become starved – thus, impacting performance. The Read Pacing

feature enhances, under user control, system performance by allowing for the

adequate servicing of all downstream devices.

PCIe Gen2, 5.0GT/s 48-lane, 3-port PCIe Switch

PEX 8647

PEX 8647 device offers PCI Express switching

C interface, CPU configuration

Related parts for pex8647

pex8647 Summary of contents

Page 1

... Data Integrity The PEX 8647 provides end-to-end CRC (ECRC) protection and Poison bit support to enable designs that require end-to-end data integrity. PLX also supports data path parity and memory (RAM) error correction as packets pass through the switch. ...

Page 2

... SerDes Power and Signal Management The PEX 8647 supports software control of the SerDes outputs to allow for the optimization of power and signal strength in a system. The PLX SerDes implementation supports four levels of power – off, low, typical, and high. The SerDes block also supports loop-back modes and advanced reporting of error conditions, which enables efficient management of the entire system ...

Page 3

... GUI interfaces to aid in configuring and debugging the PEX 8647. Part Number Description PEX8647-BB50BC F 48-Lane, 3-Port PCI Express Switch, Pb-Free (27x27mm PEX8647-BB RDK PEX 8647 Rapid Development Kit http://www.plxtech.com 2 or contact PLX sales at 408-774-9060 for sampling. ) 04/09 ...

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