rt8065 Richtek Technology Corporation, rt8065 Datasheet - Page 10

• Manufacturer Part Number: rt8065
• Description: 3a, 2mhz, Synchronous Step-down Converter
• Manufacturer: Richtek Technology Corporation

RT8065
Inductor Selection
For a given input and output voltage, the inductor value
and operating frequency determine the ripple current. The
ripple current, ΔI
with higher inductance.
Having a lower ripple current reduces not only the ESR
losses in the output capacitors but also the output voltage
ripple. Highest efficiency operation is achieved by reducing
ripple current at low frequency, but attaining this goal
requires a large inductor.
For the ripple current selection, the value of ΔI
is a reasonable starting point. The largest ripple current
occurs at the highest V
current stays below a specified maximum value, the
inductor value needs to be chosen according to the following
equation :
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. However, care must
be taken when these capacitors are used at the input and
output. When a ceramic capacitor is used at the input
and the power is supplied by a wall adapter through long
wires, a load step at the output can induce ringing at the
input. At best, this ringing can couple to the output and
be mistaken as loop instability. At worst, a sudden inrush
of current through the long wires can potentially cause a
voltage spike at V
Slope Compensation and Peak Inductor Current
Slope compensation provides stability in constant
frequency architectures by preventing sub- harmonic
oscillations at duty cycles greater than 50%. It is
accomplished internally by adding a compensating ramp
to the inductor current signal. Normally, the peak inductor
current is reduced when slope compensation is added.
For the IC, however, separated inductor current signal is
www.richtek.com
10
L =
Δ
I =
L
⎡
⎢
⎢
⎣
f
⎡
⎢
⎣
× Δ
V
V
f L
OUT
×
OUT
I
L(MAX)
⎤
⎥
⎦ ⎣
×
L
, increases with higher V
⎡
⎢
⎤ ⎡
⎥ ⎢
⎥ ⎢
⎦ ⎣
1
IN
×
−
large enough to damage the part.
1
V
−
V
OUT
V
IN
IN
IN(MAX)
V
. To guarantee that the ripple
OUT
⎤
⎥
⎦
⎤
⎥
⎥
⎦
IN
and decreases
L
= 0.4(I
MAX
)
used to monitor over current condition, so the maximum
output current stays relatively constant regardless of the
duty cycle.
Hiccup Mode Under Voltage Protection
A Hiccup Mode Under Voltage Protection (UVP) function
is provided for the IC. When the FB voltage drops below
half of the feedback reference voltage, V
function is triggered to auto soft-start the power stage
until this event is cleared. The Hiccup Mode UVP reduces
the input current in short circuit conditions, but will not be
triggered during soft-start process.
Under Voltage Lockout Threshold
The RT8065 includes an input under voltage lockout
protection (UVLO) function. If the input voltage exceeds
the UVLO rising
and prepare the PWM for operation. However, if the input
voltage falls below the UVLO falling threshold voltage during
normal operation, the device will stop switching. The UVLO
rising and falling threshold voltage has a hysteresis to
prevent noise-caused reset.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
P
where T
the ambient temperature, and θ
thermal resistance.
For recommended operating condition specifications of
the RT8065, the maximum junction temperature is 125°C
and T
thermal resistance, θ
SOP-8 (Exposed Pad) packages, the thermal resistance,
θ
thermal test board. For WDFN-8L 3x3 packages, the
thermal resistance, θ
51-7 four-layer thermal test board. The maximum power
JA
D(MAX)
, is 75° C/W on a standard JEDEC 51-7 four-layer
A
is the ambient temperature. The junction to ambient
= (T
J(MAX)
J(MAX)
is the
threshold voltage, the converter will reset
− T
maximum junction temperature, T
A
JA
) / θ
, is 70°C/W on a standard JEDEC
JA
JA
, is layout dependent. For
JA
is the junction to ambient
DS8065-03 March 2011
FB
, the UVP
A
is