as7c3256-20 Alliance Memory, Inc, as7c3256-20 Datasheet

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as7c3256-20

Manufacturer Part Number
as7c3256-20
Description
5v 32k X 8 Cmos Sram Common I/o
Manufacturer
Alliance Memory, Inc
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
as7c3256-20JC
Manufacturer:
ATMEL
Quantity:
5 530
Part Number:
as7c3256-20JI
Manufacturer:
ATMEL
Quantity:
5 530
9/24/04; v.1.2
Selection guide
Features
• Pin compatible with AS7C256
• Industrial and commercial temperature options
• Organization: 32,768 words × 8 bits
• High speed
• Very low power consumption: ACTIVE
• Very low power consumption: STANDBY
• Easy memory expansion with CE and OE inputs
Logic block diagram
Maximum address access time
Maximum output enable access time
Maximum operating current
Maximum CMOS standby current
September 2004
- 10/12/15/20 ns address access time
- 5, 6, 7, 8 ns output enable access time
- 412.5 mW max @ 10 ns
- 11 mW max CMOS I/O
GND
V
A7
A0
A1
A2
A3
A4
A5
A6
CC
A
8
A
9
Column decoder
256 X 128 X 8
Input buffer
10
(262,144)
A
Array
11
A
12
A
13
A
14
A
5V 32K X 8 CMOS SRAM (Common I/O)
Control
circuit
Alliance Semiconductor
-10
10
75
5
2
WE
OE
CE
I/O7
I/O0
Pin arrangement
A11
A13
A14
A12
V
WE
OE
A9
A8
A7
A6
A5
A4
A3
-12
12
70
CC
6
2
• TTL-compatible, three-state I/O
• 28-pin JEDEC standard packages
• ESD protection ≥ 2000 volts
• Latch-up current ≥ 200 mA
• 2.0V Data retention
28-pin TSOP 1 (8×13.4 mm)
®
- 300 mil SOJ
- 8 × 13.4 mm TSOP 1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
AS7C256A
-15
15
65
7
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Copyright © Alliance Semiconductor. All rights reserved.
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
I/O0
GND
I/O1
I/O2
A14
A12
A5
A7
A6
A4
A3
A2
A1
A0
-20
20
60
8
2
28-pin SOJ (300 mil)
AS7C256A
P. 1 of 9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
Unit
mA
mA
ns
ns
V
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
CC

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as7c3256-20 Summary of contents

Page 1

September 2004 Features • Pin compatible with AS7C256 • Industrial and commercial temperature options • Organization: 32,768 words × 8 bits • High speed - 10/12/15/20 ns address access time - output enable access time ...

Page 2

Functional description The AS7C256A is a 5.0V high-performance CMOS 262,144-bit Static Random-Access Memory (SRAM) device organized as 32,768 words × 8 bits designed for memory applications requiring fast data access at low voltage, including TM TM Pentium , ...

Page 3

Recommended operating conditions Parameter Supply voltage Input voltage Ambient operating temperature * V min = –1.0V for pulse width less than 5ns max = V + 2.0V for pulse width less than 5ns operating ...

Page 4

Read cycle (over the operating range) Parameter Read cycle time Address access time Chip enable (CE) access time Output enable (OE) access time Output hold from address change CE LOW to output in low Z CE HIGH to output in ...

Page 5

Write cycle (over the operating range) Parameter Write cycle time Chip enable to write end Address setup to write end Address setup time Write pulse width Write recovery time Address hold from end of write Data valid to write end ...

Page 6

AC test conditions - Output load: see Figure B - Input pulse level: GND Input rise and fall times: 2 ns. See Figure A. - Input and output timing reference levels: 1.5V 90% 90% ...

Page 7

Package diagrams 28-pin SOJ D e Pin 1 A2 28-pin TSOP1 9/24/04; v.1.2 ® Alliance Semiconductor AS7C256A 28-pin SOJ Min in inches A 0.128 A ...

Page 8

Ordering information Temperature Package / Access time Commercial Plastic SOJ, 300 mil Industrial Commercial TSOP 8x13.4mm Industrial Note: Add suffix ‘N’to the above part number for lead free parts. (Ex. AS7C256A-10JIN) Part numbering system AS7C 256A –XX SRAM prefix Device ...

Page 9

Alliance Semiconductor Corporation 2575, Augustine Drive, Santa Clara, CA 95054 Tel: 408 - 855 - 4900 Fax: 408 - 855 - 4999 www.alsc.com © Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt ...

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