89hpes16h16 Integrated Device Technology, 89hpes16h16 Datasheet - Page 8

• Manufacturer Part Number: 89hpes16h16
• Description: 16-lane, 16-port Pcie System Interconnect Switch
• Manufacturer: Integrated Device Technology

IDT 89HPES16H16 Data Sheet
1.
GPIO pins 22 and 25 are not available in the 23x23mm package.
MSMBSMODE
GPIO[25]
Signal
GPIO[24]
GPIO[26]
GPIO[27]
GPIO[28]
GPIO[29]
GPIO[30]
GPIO[31]
Signal
CCLKDS
CCLKUS
1
Type
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
Table 4 General Purpose I/O Pins (Part 4 of 4)
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: IOEXPINTN3
Alternate function pin type: Input
Alternate function: SMBus I/O expander interrupt 3
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: IOEXPINTN4
Alternate function pin type: Input
Alternate function: SMBus I/O expander interrupt 4
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: IOEXPINTN5
Alternate function pin type: Input
Alternate function: SMBus I/O expander interrupt 5
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: IOEXPINTN6
Alternate function pin type: Input
Alternate function: SMBus I/O expander interrupt 6
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: IOEXPINTN7
Alternate function pin type: Input
Alternate function: SMBus I/O expander interrupt 7
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
General Purpose I/O.
This pin can be configured as a general purpose I/O pin.
Alternate function pin name: IOEXPINTN10
Alternate function pin type: Input
Alternate function: SMBus I/O expander interrupt 10
Common Clock Downstream. When the CCLKDS pin is asserted, it indicates that a
common clock is being used between the downstream device and the downstream
port.
Common Clock Upstream. When the CCLKUS pin is asserted, it indicates that a
common clock is being used between the upstream device and the upstream port.
Master SMBus Slow Mode. The assertion of this pin indicates that the master SMBus
should operate at 100 KHz instead of 400 KHz. This value may not be overridden.
Table 5 System Pins (Part 1 of 2)
8 of 35
Name/Description
Name/Description
April 16, 2008