tfra84j13 ETC-unknow, tfra84j13 Datasheet
tfra84j13
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tfra84j13 Summary of contents
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... TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 1 Introduction The documentation package for the TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 chip consists of the following documents: The Ultramapper™ Family Register Description and the Ultramapper Family System Design Guide. These documents are available on a password protected website. ...
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... TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 1 Introduction .........................................................................................................................................................................1 2 Features .............................................................................................................................................................................3 2.1 Test Pattern Generator/Monitor (TPG/TPM) (x1) ........................................................................................................3 2.2 M13/E13 MUX (x3) ......................................................................................................................................................3 2.2.1 M13 ....................................................................................................................................................................3 2.2.2 E13 .....................................................................................................................................................................3 2.3 DS1/J1/E1 Framing (FRM) (3x28/21) ..........................................................................................................................4 2.4 DS3/E3/DS2/E2/DS1/E1 Multirate Cross Connect (MRXC) (x1) .................................................................................4 2.5 DS1/E1 Digital Jitter Attenuation (DJA) (3x28/21) .......................................................................................................5 2.6 Microprocessor Unit (MPU) (x1) ..................................................................................................................................5 2.7 JTAG ...........................................................................................................................................................................5 3 Overview ...
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... TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 2 Features Versatile IC supports solutions for DS3/E3, DS2/E2, DS1/J1/E1, and DS0/J0/E0 applications. Terminates DS1/ framed or unframed signals. All popular framing formats are sup- ported. Terminates up to three DS3/E3, 21 DS2 signals. 3.3 V I/O, 1.5 V CORE, low power (<2.5 W) and –40 ° ...
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... AIS (blue) alarm can replace any source or transmitter. A test-pattern monitor that can detect/count bit errors in a pseudorandom test sequence, or loss of frame or syn- chronization, can replace any sink or receiver. TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 4 ...
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... TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 One to any number of loopbacks are supported for up to 84/63 channels in DS1/E1 channels from the M13/E13 and framer functional blocks. One-to-one loopback is supported in all DS1/E1 channels. One-to-one loopback is supported for DS3/E3 channels from the M13/E13 functional blocks ...
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... Ultraframer device integrates M13/E13 multiplex/demultiplex functions and the primary rate framing function. Each interface consists of a fully integrated, full featured, primary rate framer with HDLC formatter for facility data link access. It also provides alarm reporting and bidirectional performance monitoring. The TFRA84J13 provides glueless inter- connection to analog line interface units and time-slot interchangers. ...
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... All three instances of the 28/21 channel framers are configured identically for the transport mode of operation. DS3 to/from E1 application is also possible. x3 DS3/E3 DS3/E3 LIU REF CLK CLK GEN TSWC01622 Figure 4-1. x3 DS3s/E3s to/from 84 DS1s/48 E1s Configuration Agere Systems Inc. DS1/E1 ULTRAFRAMER 84/48 TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 DS1/E1 LIU 7 ...
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... TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 4.2 DS3/E3 to/from DS0/E0 Application Figure 9-2 shows 2016 DS0/1536 E0s input via CHI or PSB. The DS0s/E0s are DS1/E1 framed, multiplexed to three DS3/ E3s, and then framed and output to DS3/E3 LIUs. The following points describe this scenario: 2016 DS0/1536 E0s are input from a switch, DS1/E1 framed, then MUXed to x3 DS3/E3 ...
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... DS1/E1 level performance monitoring capabilities on all channels in the Rx direction (DS1/E1 to DS0/E0) of the signal path. DS1/E1 LIU REF CLK CLK GEN TSWC01622 Figure 4-3. 84 DS1s/63 E1s to/from 2016 DS0s/E0s Configuration Agere Systems Inc. SYSTEM INTERFACE DS1/E1 ULTRAFRAMER 84/63 TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 (CHI OR PSB) DS0/E0 SWITCH (2016) 9 ...
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... TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 5 Block Description 5.1 M13/E13 Multiplexer (M13/E13 MUX) The M13/E13 block (three blocks per device highly configurable multiplexer/demultiplexer for which each block can be configured for M13 or E13 operation. The features are as described below. 5.1.1 M13 MUX The M13 may operate in the C-bit parity or M23 mode mixed M13/M23 mode ...
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... I/O are fixed (see MRXC section of the Register Description for more information). Otherwise, applica- tions are practically limited to 84 I/O. Agere Systems Inc. TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 Network serial multiplexed bus (NSMI): — Framer—NSMI payload assembled/disassembled into DS1/E1s. — ...
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... D4 superframe SF D4 superframe: F framing only T J-D4 superframe with Japanese remote alarm Agere Systems Inc. TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 DDS SLC-96 ESF J-ESF (J1 standard with different CRC-6 algorithm) Nonalign DS1 (193 bits—clear channel) CEPT basic frame (ITU G.706) CEPT CRC-4 multiframe with 100 ms timer (ITU G ...
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... TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 5.6.4 Signaling Processor The signaling processor supports the following modes: Superframe (D4, SLC-96): 2-state, 4-state, and 16-state VT 1.5 SPE: 2-state, 4-state, and 16-state Extended superframe: 2-state, 4-state, and 16-state CEPT: common channel signaling (CCS) (TS-16) Transparent (pass through) signaling ...
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... Agere, Agere Systems, and the Agere logo are registered trademarks of Agere Systems Inc. Ultramapper is a trademark of Agere Systems Inc. Copyright © 2005 Agere Systems Inc. All Rights Reserved April 29, 2005 DS03-076BBAC-4 (Replaces DS03-076BBAC-3) TFRA84J13 Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 FEBE Far-end block error HDB3 ...