bcm1280 Broadcom Corp., bcm1280 Datasheet

bcm1280

Manufacturer Part Number

bcm1280

Description

Bcm1280 - Dual-core 64-bit Mips Processor With Ddr2, Gbe, Spi-4/ht

Manufacturer

Broadcom Corp.

Datasheet

1.BCM1280.pdf (2 pages)

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•

Two 64-bit MIPS

• Quad issue in-order pipeline with dual-execute and dual-memory pipes

• Enhanced skew pipeline enables a zero load-to-use penalty

• 32-KB instruction cache and 32-KB data cache (ECC protected)

Fast on-chip multiprocessor bus

• Connects the CPUs, L2 cache, memory controller, and I/O bridges

• Runs at half the CPU core frequency and is 256 bits wide

On-chip L2 cache

• 1 MB shared by two CPUs and I/O agents

• Eight-way associative, ECC protected

• Any way can be programmed as fast on-chip RAM

DDR memory controller

• Memory bandwidth as high as 100 Gbps

• Configurable as 2 x 64-bit or 4 x 32-bit wide channels

• Runs up to 400-MHz clock rate, 800-MHz data rate

• Support for DDR and DDR2

Three independent, 19.2 full-duplex ports

• Configurable as 16/8-bit HyperTransport™ (HT) or Channelized OIF

• Runs up to 600 MHz DDR for aggregate bandwidth of 38.4 Gbps per

• Includes Intelligent Hash and Filter Engine on each port to route

• Supports glueless connectivity of multiple BCM1280 devices to build a

On-chip switch

• Connects multiprocessor bus to high-speed interfaces

• 256-Gbps bisection bandwidth

• Supports both packet transfer and memory transactions

Integrated network and system I/O

• Four Gigabit Ethernet MACs configurable as packet FIFO interfaces

• 64-bit PCI-X

• Generic I/O for direct connect to boot ROM, flash memory

• Two SMBus serial configuration interfaces

• PCMCIA control interface and up to 16 interrupts

• Four UART interfaces

On-chip debug capability

• EJTAG

• Bus trace unit (internal logic analyzer)

Support for leading operating systems, including VxWorks

and QNX

Evaluation board platform available with samples (includes tools,

firmware, and software drivers)

SPI-4 Phase 2

port

packets

distributed shared-memory system with hardware-based coherency

DUAL-CORE 64-BIT MIPS

interface at 133 MHz

CPUs, scalable from 800 MHz–1.2 GHz

F E A T U R E S

, Linux

PROCESSOR WITH SPI-4/HT

BCM1280

•

Because of its world-class performance, power efficiency, and integration,

the BCM1280 processor is ideal for a broad variety of applications,

including:

• Enterprise-class routers and switches

• Multifunction security platforms (VPN/SSL/IDS)

• High-end RAID arrays

• SAN routers/gateways/switches

• Wireless infrastructure platforms (e.g., RNC, GGSN, MSC)

Industry-leading performance

• 2.5 Dhrystone MIPS/MHz per CPU

• 10 million packets per second of L3 forwarding

• 128 Gbps (@ 1.0 GHz) on-chip bus bandwidth, with 100 Gbps

Low-power dissipation of 17W @ 1 GHz

High functional integration, reducing overall system cost

Programming ease and flexibility based on MIPS64

architecture (ISA)

Software-compatible with BCM1250 and BCM112X

Broad tools and system software support

ASIC or NPU

memory bandwidth and 145 Gbps 1/0 bandwidth

S U M M A R Y O F B E N E F I T S

SPI-4.2

A P P L I C A T I O N S

Multi-Service Card

BCM1280

Expansion

CPU

SPI-4.2

HT or

SPI-4.2

Interface

Fabric

instruction set

Related parts for bcm1280

bcm1280 Summary of contents

Page 1

... Broad tools and system software support Because of its world-class performance, power efficiency, and integration, the BCM1280 processor is ideal for a broad variety of applications, including: • Enterprise-class routers and switches • Multifunction security platforms (VPN/SSL/IDS) • High-end RAID arrays • ...

Page 2

... ZBbus™, a high-speed, split-transaction multiprocessor bus. The bus implements the standard MESI protocol to ensure coherency between the two CPUs, L2 cache, I/O agents, and memory. In addition, the BCM1280 supports an interchip ccNUMA protocol for cache coherent distributed shared memory systems. The three high-speed HT ports provide interchip communications to other BCM1280 processors bridging I/O chips ...

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