emc2101 Standard Microsystems Corp., emc2101 Datasheet
emc2101
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emc2101 Summary of contents
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... DD while the PWM output has a range 100% with steps. The EMC2101 has an option to automatically upload the contents of an attached SMBus compatible EEPROM for auto-programming upon power up. Advanced thermal sensing enables reduced validation and characterization time as well as accurately operat- ing with smaller-geometry processors ...
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... EMC2101-ACZL-TR FOR 8 PIN, MSOP LEAD-FREE ROHS COMPLIANT PACKAGE EMC2101-R-ACZL-TR FOR 8 PIN, MSOP LEAD-FREE ROHS COMPLIANT PACKAGE EMC2101-ACZT-TR FOR 8 PIN, SOIC LEAD-FREE ROHS COMPLIANT PACKAGE 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000, FAX (631) 273-3123 Copyright © 2008 SMSC or its subsidiaries. All rights reserved. ...
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... Pin Diagram for EMC2101 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.2 Pin Description for EMC2101 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Chapter 3 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.1 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.2 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3.3 SMBus Client Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3.4 EEPROM Loader Electrical Specifications (EMC2101-R only Chapter 4 System Management Bus Interface Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.1 System Management Bus Interface Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.2 Write Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.3 Read Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.4 Send Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.5 Receive Byte ...
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... Fan Control Look-Up Table Hysteresis Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 6.22 Fan Control Look-Up Table Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 6.23 Averaging Filter Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 6.24 Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 6.25 Manufacturer ID Register (FEh 6.26 Revision Register (FFh Appendix A Advanced PWM Options Appendix B TACH Reference Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 Chapter 7 Package Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Revision 2.53 (02-19-08) SMBus Fan Control with 1°C Accurate Temperature Monitoring 4 DATASHEET Datasheet SMSC EMC2101 ...
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... Datasheet List of Figures Figure 2.1 EMC2101 Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Figure 4.1 SMBus Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Figure 5.1 System Diagram for EMC2101 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Figure 5.2 System Diagram for EMC2101- Figure 5.3 Block Diagram of Temperature Monitoring Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 5.4 External Diode configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Figure 5.5 Temperature Filter Step Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Figure 5.6 Temperature Filter Impulse Response Figure 5.7 Fan Control Look-Up Table Example Figure 5 ...
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... Table 4.6 Alert Response Address Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Table 4.7 Block Read Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Table 5.1 ALERT/ TACH Pull-up Resistors - SMBus / FAN MODE for EMC2101- Table 5.2 EMC2101 External Temperature Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 5.3 EMC2101 Internal Temperature Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Table 6.1 Register Set in Hexadecimal Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Table 6.2 Temperature Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Table 6 ...
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... SMBus Fan Control with 1°C Accurate Temperature Monitoring Datasheet Chapter 1 Device Selection The EMC2101 is available with the following options and configurations as shown in PART NUMBER FAN OPERATION EMC2101 - 1 PWM Drive, 0% drive EMC2101 - R Selected via pull-up SMSC EMC2101 Table 1.1 Device Selection COMMUNICATIONS SMBus ...
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... SMCLK 8 1 SMDATA 7 2 EMC2101 3 6 ALERT / TACH 4 GND 5 Figure 2.1 EMC2101 Pinout Table 2.1 Pin Description FUNCTION 3.3V Power supply External diode positive (anode) connection External diode negative (cathode) connection PWM Output (default - software programmed) DAC Output software programmed Ground ALERT - Open drain I/O operates as ...
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... DD A CHARACTERISTIC SYMBOL Supply Voltage V DD Supply Current I DD Supply Current I DD SMSC EMC2101 Table 3.1 Absolute Maximum Ratings Refer to JEDEC Spec. J-STD- Table 3.2 Electrical Specifications Typical values are 27°C unless otherwise noted A MIN TYP MAX UNIT DC Power 3 ...
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... T < 125°C DIODE 11 bit resolution Connected across External Diode (2N3904) Connected across Substrate Transistor (CPU diode) Series resistance in DP and DN lines TACH valid For 64 steps, higher frequencies are possible with reduced resolution. See Section 6.34. Current Load = ±1mA SMSC EMC2101 ...
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... BUF Stop Hold Time: Start t HD:STA Setup Time: Start t SU:STA Setup Time: Stop t SU:STO Data Hold Time t HD:DAT Data Setup Time t SU:DAT SMSC EMC2101 Typical values are 27°C unless otherwise noted A MIN TYP MAX UNIT bits 40 us ...
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... RISE Capacitive Load C LOAD Note 3.1 300ns rise time max is required for 400kHz bus operation. For lower clock frequencies the maximum rise time is (0 3.4 EEPROM Loader Electrical Specifications (EMC2101-R only) Table 3.4 EEPROM Loader Electrical Specifications V = 3.0V to 3.6V CHARACTERISTIC SYMBOL Input High Voltage ...
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... Data Setup Time t SU:DAT Clock Low Period t LOW Clock High Period t HIGH Clock/Data Fall time t FALL Clock/Data Rise time t RISE Capacitive Load C LOAD SMSC EMC2101 Typical values are 27°C unless otherwise noted A MIN TYP MAX UNITS 100 ns 1.3 us 0.6 us 300 ...
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... T BUF Start Condition The EMC2101 is SMBus 2.0 compatible and supports Send Byte, Read Byte, Receive Byte and the Alert Response Address as valid protocols as shown below. All of the below protocols use the convention in 4.2 Write Byte The Write Byte is used to write one byte of data to the registers as shown below ...
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... When it detects that the ALERT / TACH pin is asserted, the host will send the Alert Response Address (ARA) to the general address of 000_1100b. All devices with active interrupts will respond with their client address as shown in Table 4.6 Alert Response Address Protocol ALERT RESPONSE START ADDRESS 1 7 SMSC EMC2101 Table 4.3 Read Byte Protocol Register ACK START Slave Address Address 8 1 ...
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... The EMC2101 will respond to the ARA in the following way when the ALERT / TACH pin is configured as an Interrupt: 1. Send Slave Address and verify that full slave address was sent (i.e. the SMBus communication from the device was not prematurely stopped due to a bus contention event). ...
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... The EEPROM should be loaded to mirror the register set of the EMC2101 with the desired configuration set. All undefined registers in the EMC2101 register set should be loaded with 00h in the EEPROM. Likewise, all registers that are read-only in the EMC2101 register set should be loaded with 00h in the EEPROM ...
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... Chapter 5 General Description The EMC2101 is an environmental monitoring device with a selectable PWM or DAC fan driver output, one external temperature monitoring channel and one internal temperature monitor. It contains advanced circuitry to remove errors induced by series resistance and CPU thermal diode process differences to provide accurate temperature measurements and accurate fan control. ...
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... Power Up (EMC2101-R Only) The EMC2101-R (only) will power up with the fan driver set to either 100% duty cycle or 0% duty cycle, depending on the value of the pull-up resistor on the ALERT / TACH pin. (See in this state until either the Fan Setting Register is written or until the following activities have occurred: 1. The Fan Control Look-Up Table is loaded and the PROG bit is set to ‘ ...
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... Registers as normal) and the MASK bits will do nothing. Likewise, the device will not respond to the ARA command. For the EMC2101 - R, the value of this pull-up resistor determines the initial FAN output mode of operation as well as whether the device auto loads from an EEPROM or via an SMBus host per Table 5 ...
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... The MASK bit behaves differently depending on which mode the ALERT / TACH pin is configured to operate in. If the EMC2101 is configured with the ALERT / TACH pin operating in Interrupt Mode, the MASK bit will be set in the following cases: 1. Automatically after the Status Register has been read if any bits in the Status Register have been set (except BUSY and FAULT) (See 2 ...
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... PNP Figure 5.3 Block Diagram of Temperature Monitoring Circuit Figure 5.3 shows a block diagram of the temperature measurement circuit. As shown, the EMC2101 incorporates a delta-sigma analog to digital converter that integrates the temperature diode voltage from multiple bias currents. The external temperature diodes can be connected as shown in ...
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... SMBus Fan Control with 1°C Accurate Temperature Monitoring Datasheet The EMC2101 measures temperatures from -64°C to 127°C represented as a binary two’s complement number. Internal temperatures are in 1°C steps, external temperatures are in 0.125°C steps. Table 5.2 shows the temperature format for the external diode and format for the internal diode ...
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... Temperature Filter The EMC2101 contains variable filtering options to suppress thermally or electrically noisy signals on the External Diode lines. This filter can be configured as Level 1, Level 2, or Disabled (see Section 6.23). The typical filter performance is shown Figure 5.5 Temperature Filter Step Response ...
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... Programmable Ideality Factor The EMC2101 is designed for an external diode with an ideality factor of 1.008. When an external diode, processor or discrete, has a different ideality factor, an error is introduced in the temperature measurement which must be corrected. This is typically done using programmable offset registers but this correction is only accurate at one temperature since an ideality factor mismatch introduces an error that is a linear function of temperature ...
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... Fan Control The EMC2101 includes either a PWM or a linear DAC based fan driver on the shared FAN pin. Both PWM and DAC use the Fan Control Look-Up Table and/or Fan Setting Register interchangeably as well as the Spin-Up Routine. In addition, the EMC2101 can monitor the fan speed using the ALERT / TACH pin. ...
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... Hyst Hyst T1 Figure 5.7 Fan Control Look-Up Table Example If the Fan Control Look-Up Table is not used, the user may program the fan output directly by writing to the Fan Setting Register (4Ch - see SMSC EMC2101 Fan Setting Measurement taken Time Section 6.18). 27 DATASHEET ...
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... Fault Queue The EMC2101 supports a Fault Queue feature to reduce interrupts caused by spurious temperature readings. This feature, (see three consecutive out-of-limit HIGH, LOW, or T_CRIT temperature readings. example of this behavior. The Fault Queue only applies to the External Diode channels. Temp TLIMIT Status Register - ETDS high Figure 5 ...
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... External Diode High Limit Low Byte 14h R/W External Diode Low Limit Low Byte 16h R/W Alert Mask SMSC EMC2101 FUNCTION Stores the Internal Temperature Stores the External Temperature High Byte Reports internal, external, and TCRIT alarms Alert Mask, STANDBY, TCRIT override, Alert Fault ...
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... Page 35 (10°C) FFh Page 39 FFh Page 39 FFh Page 39 FFh Page 39 20h Page 40 3Fh Page 41 00h Page 42 17h Page 43 01h Page 43 04h Page 44 (4°C) 7Fh Page 45 3Fh Page 45 7Fh Page 45 3Fh Page 45 7Fh Page 45 3Fh Page 45 SMSC EMC2101 ...
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... TACH Reading Low Byte Register will automatically refresh this stored high byte data. 6.2 Register Descriptions The registers are described in detail below. A bit entry of a ‘-’ indicates that the bit is not used and will always read 0. SMSC EMC2101 FUNCTION Look Up Table Temperature Setting 4 Associated Fan Setting for ...
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... Bit 6 - INT_HIGH - Internal temperature has met or exceeded the high limit. Bit 5 - EEPROM - Indicates that the EEPROM could not be found when the device powers up in the Auto-Program Mode (see for the EMC2101 device. Bit 4 - EXT_HIGH - External Diode temperature has exceeded the high limit. Revision 2.53 (02-19-08) SMBus Fan Control with 1° ...
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... Configuration MASK 09h The configuration register controls the basic functionality of the EMC2101. The bits are described below: Bit 7 - MASK - Masks the ALERT / TACH pin functionality when the device is configured as an ALERT output in Interrupt Mode. This bit is ignored if the ALERT / TACH pin is configured as an ALERT output in Comparator Mode configured as a TACH input ...
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... SMBus Fan Control with 1°C Accurate Temperature Monitoring Table 6.5 Conversion Rate Register CONV3 Table 6.6 Conversion Rates DATASHEET Datasheet DEFAULT CONV2 CONV1 CONV0 08h Table 6.6. CONVERSIONS PER SECOND 1/16 1/8 1/4 1 (default SMSC EMC2101 ...
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... The TCRIT bit will remain set in the Status Register until the External Diode Temperature drops below a lower threshold given by equation [2]. See Section 6.3 and Section 6.5 6.8 External Temperature Force Register ADDR. R/W REGISTER External 0Ch R/W Temperature Force SMSC EMC2101 Table 6.7 Temperature Data Registers ...
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... THIGH and TCRIT limits normally but not used to determine the fan speed. APPLICATION NOTE: This mode is used if the host or system requires temperature data from a source other than the EMC2101 External Diode to be used for fan control. 6.9 One Shot Register ADDR ...
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... Ideality factor. Table 6.13 Ideality Factor Look-Up Table SETTING FACTOR 08h 0.9949 09h 0.9962 0Ah 0.9975 0Bh 0.9988 0Ch 1.0001 0Dh 1.0014 0Eh 1.0027 SMSC EMC2101 IDCF[5:0] SETTING FACTOR 18h 1.0159 19h 1.0172 1Ah 1.0185 1Bh 1 ...
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... Table 6.15 CPU Beta Values DATASHEET Datasheet SETTING FACTOR 2Fh 1.0462 30h 1.0475 31h 1.0488 32h 1.0501 33h 1.0514 34h 1.0527 35h 1.0540 36h 1.0553 37h 1.0566 DEFAULT BETA[2:0] 08h B0 MINIMUM BETA 0 0.11 1 0.18 0 0.25 SMSC EMC2101 ...
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... If the measured TACH is higher than this limit (indicating that the fan speed is lower than the minimum RPM value), then the TACH bit is set in the Status Register. Additionally if the measured TACH count exceeds this limit, depending on the status of the TACH_M[1:0] bits (see SMSC EMC2101 Table 6.15 CPU Beta Values (continued ...
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... The value written into the Fan Setting Register will be instantly applied to the fan driver and the Fan Control Look-Up Table will not be used. Bit 4 - POLARITY- sets the polarity of the Fan output driver. For the EMC2101-R, the value of this bit is determined by the value of the pull-up resistor on the ALERT / TACH pin (see PWM default value is set at 100% duty cycle, the default value is set to ‘ ...
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... APPLICATION NOTE: If the SPIN_TIME[2:0] bits are set at 000b, then the Spin-Up Routine is bypassed regardless of the status of this bit. Bit SPIN_DRIVE[1:0] - Determines the setting of the drive circuit during the Spin-Up routine according to Table 6.21. SPIN_DRIVE[1: SMSC EMC2101 Table 6.19 TACH Modes TACH_M[ ...
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... Table 6.22. Table 6.22 Spin-Up Time Spin-Up Cycle bypassed 1 0.05 sec. 0 0.1 sec. 1 0.2 sec. 0 0.4 sec. 1 0.8 sec. 0 1.6 sec. 1 3.2 sec. (default) Table 6.23 Fan Setting Register [4] below. 42 DATASHEET Datasheet SPIN UP TIME DEFAULT 00h SMSC EMC2101 ...
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... PWM Frequency Register to determine the final PWM frequency that the load will see. When the CLK_OVR bit is set to a logic ‘0’, the setting of this register is not changed and is not used to determine the effective PWM frequency. The PWM frequency when the PWM Frequency Divide Register is used is shown in SMSC EMC2101 ⎛ ⎞ FAN_SETTING × ...
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... DATASHEET Datasheet Where: Frequency register (4Dh) FREQ is the desired PWM Frequency FAN_SETTING TO GET 75% EFFECTIVE PWM DUTY CYCLE FREQUENCY (HZ) 2Eh (74.2%) 5806.5 2Eh (74.2%) 341.6 2Eh (74.2%) 181.5 2Eh (74.2%) 81.8 2Eh (74.2%) 30.2 2Eh (74.2%) 30.0 2Eh (74.2%) 22 DEFAULT 04h (4°C) Section 5.6.4. SMSC EMC2101 [5] ...
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... R/W Up Table T7 Fan Control Look- 5Dh R/W Up Table S7 Fan Control Look- 5Eh R/W Up Table T8 Fan Control Look- 5Fh R/W Up Table S8 Note 6.3 When the PROG bit in the Fan Configuration Register (see registers become read only. SMSC EMC2101 ...
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... SMBus Fan Control with 1°C Accurate Temperature Monitoring Table 6.29 Averaging Filter Register Table 6.30. See Figure 5.5 Table 6.30 Averaging Settings 0 0 Disabled (default) 1 Level 1 0 Level 1 1 Level 2 46 DATASHEET Datasheet DEFAULT ALERT_ FILTER[1:0] 00h COMP and Figure 5.6 for examples on AVERAGING Section 5.4.2). SMSC EMC2101 ...
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... Manufacturer ID Register (FEh) ADDR. R/W REGISTER SMSC ID FEh R Register The Manufacturer ID register contains an 8 bit word that identifies the SMSC as the manufacturer of the EMC2101. 6.26 Revision Register (FFh) ADDR. R/W REGISTER FFh R Revision Register The Revision register contains an 8 bit word that identifies the die revision. ...
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... Where: PWM_F is the setting of the PWM Frequency register (4Dh) 360k PWM_D is the setting of the PWM ----------------------------- = Frequency Divide Register (4Eh) 2xPWM_F 1.4k ----------------------------- = 2xPWM_F 48 DATASHEET Datasheet or, if the PWM Divide Register is and the PWM resolution will vary [6] [7] [8] CLK_SEL = ‘0’ CLK_SEL = ‘1’ [9] SMSC EMC2101 ...
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Table 6.34 Fan Effective Duty Cycle Resolution and Frequency EFFECTIVE PWM_F EFFECTIVE DUTY CYCLE [4:0] RESOLUTION (AT 75% SETTING (%) FAN_SETTING) 00h 01h 50.00 100% 02h 25.00% 100% 03h 16.67% 100% 04h 12.50% 100% 05h 10.00% 100% 06h 8.33% 100% ...
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Table 6.34 Fan Effective Duty Cycle Resolution and Frequency (continued) EFFECTIVE PWM_F EFFECTIVE DUTY CYCLE [4:0] RESOLUTION (AT 75% SETTING (%) FAN_SETTING) 14h 2.50 100% 15h 2.38 100% 16h 2.27 100% 17h 2.17 100% 18h 2.08 100% 19h 2.00 96% ...
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Appendix B TACH Reference Table DEC HEX RPM DEC HEX 512 200h 10547 1280 500h 528 210h 10227 1296 510h 544 220h 9926 1312 520h 560 230h 9643 1328 530h 576 240h 9375 1344 540h 592 250h 9122 1360 550h ...
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Table 6.35 Example TACH Decode 10k RPM to 1k RPM DEC HEX RPM DEC HEX RPM 832 340h 6490 1600 640h 3375 848 350h 6368 1616 650h 3342 864 360h 6250 1632 660h 3309 880 370h 6136 1648 670h 3277 ...
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Table 6.35 Example TACH Decode 10k RPM to 1k RPM DEC HEX RPM DEC HEX RPM 1216 4C0h 4441 1984 7C0h 2722 1232 4D0h 4383 2000 7D0h 2700 1248 4E0h 4327 2016 7E0h 2679 1264 4F0h 4272 2032 7F0h 2657 ...
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Chapter 7 Package Diagrams 3 D PIN 1 IDENTIFIER AREA (D/2 X E1/ TOP VIEW C SEATING PLANE A1 ccc C SIDE VIEW C GAUGE PLANE 0.25 SEATING PLANE 0° - 8° DETAIL ...
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SEE DETAIL "A" INDEX AREA (D/2 X E1/ TOP VIEW END VIEW SEATING PLANE A1 ccc C SIDE VIEW 3-D VIEW H 0.25 ...