emc2104 Standard Microsystems Corp., emc2104 Datasheet - Page 79

• Manufacturer Part Number: emc2104
• Description: Emc2104 Dual Rpm-based Pwm Fan Controller With Hardware Thermal Shutdown
• Manufacturer: Standard Microsystems Corp.

ADDR
ADDR
E0h
B6h
B7h
B8h
B9h
Dual RPM-Based PWM Fan Controller with Hardware Thermal Shutdown
Datasheet
SMSC EMC2104
6.35
R/W
R/W
R/W
R/W
R/W
R/W
R/W
LUT2 Voltage
LUT2 Temp 4
LUT 2 Temp
LUT 2 Temp
REGISTER
LUT2 VIN2
3 Setting 8
3 Setting 8
LUT 2 Ext
Hysteresis
REGISTER
Muxed Pin
Setting 8
Setting 8
Setting 8
The Look Up Table 2 Registers hold the 40 entries of the Look Up Table that controls the drive of Fan
2. As the temperature (or voltage) channels are updated, the measured temperature for each channel
is compared against the respective entries in the Look Up Table and the associated drive setting is
loaded into an internal shadow register and stored.
The Muxed Pin Configuration Register controls the pin function for all of the multiple function GPIO
pins.
Bit 2 - GPIO3_CFG - Determines the pin function for the PWM2 / GPIO3 pin as well as the DAC2 pin.
Bit 1 - GPIO2_CFG - Determines the pin functions for the TACH2 / GPIO2 pin.
Bit 0 - GPIO1_CFG - Determines the pin function for the CLK_IN / GPIO1 pin.
Muxed Pin Configuration Register
Diode 2
Config
‘0’ (default) - The PWM2/ GPIO3 pin functions as a PWM output for the 2nd the RPM based Fan
Speed Control Algorithm (FSC).
‘1’ - The PWM2 / GPIO3 pin functions as a GPIO. The 2nd RPM based Fan Speed Control
Algorithm will be disabled. All PWM2 controls will be ignored though are still writable via the
SMBus.
‘0’ (default) - The TACH2 / GPIO2 pin functions as a tachometer input for the 2nd the RPM based
Fan Speed Control Algorithm (FSC).
‘1’ - The TACH2 / GPIO2 pin functions as a GPIO. When set, the EN_ALGO2 bit will automatically
be set to ‘0’ and cannot be set.
‘0’ - The CLK_IN / GPIO1 pin functions as a clock input for the RPM based Fan Speed Control
Algorithm (FSC).
‘1’ (default) - The CLK_IN / GPIO1 pin functions as a GPIO.
TACH /
DRIVE
B7
X
X
X
X
X
X
-
Table 6.51 Look Up Table2 Registers (continued)
Table 6.52 Muxed Pin Configuration Register
752.9
752.9
B7
B6
-
-
-
-
-
376.5
376.5
DATASHEET
B6
64
64
64
-
B5
-
79
188.2
188.2
B5
32
32
32
-
B4
-
94.12
94.12
B4
16
16
16
16
B3
-
47.06
47.06
B3
8
8
8
8
GPIO3
_CFG
B2
23.53
23.53
B2
4
4
4
4
GPIO2
_CFG
Revision 1.74 (05-08-08)
11.76
11.76
B1
B1
2
2
2
2
GPIO1
_CFG
5.88
5.88
B0
B0
1
1
1
1
DEFAULT
DEFAULT
(127°C)
(127°C)
(127°C)
(0.4V)
(0.4V)
7Fh
7Fh
7Fh
7Fh
7Fh
0Ah
01h