peel16cv8s-25 ETC-unknow, peel16cv8s-25 Datasheet

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peel16cv8s-25

Manufacturer Part Number
peel16cv8s-25
Description
Cmos Programmable Electrically Erasable Logic Device
Manufacturer
ETC-unknow
Datasheet
Features
General Description
The PEEL
(PEEL) device providing an attractive alternative to ordinary PLDs. The
PEEL
production practicality needed by logic designers today.
The PEEL
packages (see Figure 1) with 25ns speed and power consumption as
low as 37mA. EE-Reprogrammability provides the convenience of
instant reprogramming for development and reusable production inven-
tory minimizing the impact of programming changes or errors. EE-
Reprogrammability also improves factory testability, thus assuring the
highest quality possible.
Figure 1 - Pin Configuration
Compatible with Popular 16V8 Devices
I/CLK1
- 16V8 socket and function compatible
- Programs with standard 16V8 JEDEC file
- 20-pin DIP, SOIC, TSSOP, and PLCC
CMOS Electrically Erasable Technology
- Superior factory testing
- Reprogrammable in plastic package
- Reduces retrofit and development costs
Application Versatility
- Replaces random logic
- Super sets standard 20-pin PLDs (PALs)
TM
DIP
GND
PLCC-J
I
I
I
I
I
I
I
I
I
I
I
I
I
16CV8 offers the performance, flexibility, ease of design and
TM
TM
4
5
6
7
8
16CV8 is available in 20-pin DIP, PLCC, SOIC and TSSOP
1
2
3
4
5
6
7
8
9
10
16CV8 is a Programmable Electrically Erasable Logic
3 2 1
9 10 11 12 13
20
19
20
19
18
17
16
15
14
13
12
11
18
17
16
15
14
CMOS Programmable Electrically Erasable Logic Device
I
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
CC
I/CLK1
I/CLK1
GND
GND
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
20
19
18
17
16
15
14
13
12
11
TSSOP
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
PEEL™ 16CV8 -25
CC
SOIC
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
CC
1
The PEEL
pin PLDs (PAL, GAL, EPLD etc.). See Figure 2. ICT’s PEEL
can be programmed with existing 16CV8 JEDEC file. Some program-
mers also allow the PEEL
PLD 16L8, 16R4, 16R6 and 16R8 JEDEC files. Additional development
and programming support for the PEEL
third-party programmers and development software. ICT also offers free
PLACE development software.
Figure 2 - Block Diagram
/CLK
I/OE
Multiple Speed, Power Options
- Speeds range 25ns
- Power as low as 37mA @ 25mHZ
Development / Programmer Support
- Third party software and programmers
- ICT PLACE Development Software
- Automatic programmer translation and JEDEC file translation
software available for the most popular PAL devices
TM
16CV8 architecture allows it to replace over standard 20-
64 TERMS
32 INPUTS
ARRAY
"AND"
PEEL
X
TM
CLK
16CV8 to be programmed directly from
MACRO
CELL
TM
16CV8 is provided by popular
Commercial
04-02-004I
TM
16CV8
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O

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peel16cv8s-25 Summary of contents

Page 1

CMOS Programmable Electrically Erasable Logic Device Features Compatible with Popular 16V8 Devices - 16V8 socket and function compatible - Programs with standard 16V8 JEDEC file - 20-pin DIP, SOIC, TSSOP, and PLCC CMOS Electrically Erasable Technology - Superior factory testing ...

Page 2

Functional Description TM The PEEL 16CV8 implements logic functions as sum-of- products expressions in a programmable-AND/fixed-OR logic array. User-defined functions are created by programming the connections of input signals into the array. User-configurable output structures in the form of macro- ...

Page 3

TM Table 1 : PEEL 16CV8 Device Compatibility PLD Architecture Compatibility 16RP6 14RP8 Programmable Macrocell The macrocell provides complete control over the architecture of each output. The ability to configure each output independently permits users TM to tailor the configuration ...

Page 4

Complex Mode In Complex mode, seven product terms feed the OR array which can generate a purely combinatorial function for the output pin. The pro- grammable output polarity selector provides active-high or active-low logic, eliminating the need for external inverters. ...

Page 5

Figure 6 - PEEL TM 16CV8 Logic Array - Simple Mode (see Figure 3 for macrocell details) MACRO CELL MACRO CELL MACRO ...

Page 6

Figure 7 - PEEL 16CV8 Logic Array - Complex Mode (see Figure 4 for macrocell details) MACRO CELL MACRO CELL MACRO ...

Page 7

CLK Figure 8 - PEEL 16CV8 Logic Array - Registered Mode (see Figure 5 for macrocell details) MACRO CELL MACRO CELL MACRO ...

Page 8

Absolute Maximum Ratings Symbol Parameter V Supply Voltage Voltage Applied to Any Pin I Output Current O T Storage Temperature ST T Lead Temperature LT Operating Range Symbol Parameter Vcc Supply Voltage T Ambient ...

Page 9

A. C. Electrical Characteristics Symbol CO1 t CO2 MAX1 f MAX2 f MAX3 ...

Page 10

Ordering Information Part Number TM PEEL 16CV8P-25 TM PEEL 16CV8J-25 TM PEEL 16CV8S-25 TM PEEL 16CV8T-25 Part Number Package P = Plastic 300mil DIP J = Plastic (J) Leaded Chip Carrier (PLCC SOIC T = TSSOP Speed Temperature ...

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