ev1340qi Enpirion, ev1340qi Datasheet

no-image

ev1340qi

Manufacturer Part Number
ev1340qi
Description
5a Synchronous Highly Integrated Dc-dc Ddr2/3/qdrtm Memory Termination And Low Vin Power Soc
Manufacturer
Enpirion
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EV1340QI
Manufacturer:
ALTERA
0
Part Number:
EV1340QI
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Company:
Part Number:
EV1340QI
Quantity:
52
Part Number:
ev1340qi-E
Manufacturer:
ALTERA
0
Description
The EV1340 is a Power System on a Chip
(PowerSoC) DC to DC converter in a 54 pin QFN
that is optimized for DDR2, DDR3, and QDR
VTT applications.
power supply (AVIN) for the controller, and an
input supply (VDDQ) voltage range of 1.0V to
1.8V. It provides a tightly regulated and very
stable output voltage (VTT) which tracks VDDQ
while sinking and sourcing up to 5A of output
current. In addition, the EV1340 is an excellent
solution for general low V
high efficiency is critical.
The
techniques, high-density circuit integrations and
optimized
Enpirion’s proprietary inductor technology to
deliver high-quality, ultra compact, non-isolated
DC-DC conversion.
The complete power converter solution enhances
productivity by offering greatly simplified board
design, layout and manufacturing requirements.
Figure 1: EV1340 Total Solution Size ~ 125mm
06218
EV1340
(not to scale)
switching
0402
0402
10 mm x 5.5 mm
utilizes
It requires a nominal 3.3V
0402
0402
EV1340QI
frequency
0402
0402
100µF
1206
100µF
1206
IN
innovative
applications where
0402
DDR2/3/QDR
0402
0402
along
47µF
0805
2
circuit
5A Synchronous Highly Integrated DC-DC
with
TM
10/19/2011
TM
Features
• High Efficiency, Up to 91%
• Output Voltage Can Track VDDQ to within
• Source and Sink Capability up to 5A
• 125mm
• VDDQ Range (1.0V to 1.8V )
• Monotonic Startup With Pre-bias
• Programmable Soft-Start Time
• Thermal Shutdown Protection
• Over Current and Short Circuit Protection
• Under-Voltage Protection
• RoHS Compliant, MSL level 3, 260°C reflow
Applications
• Bus Termination: DDR2, DDR3, & QDR™
• General Low V
Figure 2: Typical V
+/- 1.5%
Memory
Memory Termination and Low VIN
the memory core voltage; V
termination voltage that tracks V
2
Total Solution Size
IN
TT
Applications
Application Schematic (V
www.enpirion.com
Power SoC
TT
EV1340QI
is memory
DDQ
)
DDQ
Rev: A
is

Related parts for ev1340qi

ev1340qi Summary of contents

Page 1

... Bus Termination: DDR2, DDR3, & QDR™ Memory • General Low V 0402 0402 0402 47µF 0805 Figure 2: Typical V 2 10/19/2011 EV1340QI Power SoC 2 Total Solution Size Applications IN Application Schematic (V TT the memory core voltage memory TT termination voltage that tracks V DDQ www ...

Page 2

... Figure 3: Pinout Diagram (Top View). All pins must be soldered to PCB NOTE: There are specific keep-out areas underneath the EV1340 to consider when laying out a PCB for this device. Please see Figures 8, 10, and 11 for more layout details. FUNCTION 2 10/19/2011 EV1340QI www.enpirion.com Rev: A ...

Page 3

... Failure to follow these guidelines may result in damage to the device. Thermal Not a perimeter pin. Device thermal pad and PGND. Connected to the system ground plane. 55 Pad See Layout Recommendations section. (PGND) ©Enpirion 2011 all rights reserved, E&OE 06218 FUNCTION 3 10/19/2011 EV1340QI www.enpirion.com Rev: A ...

Page 4

... IN -0.5 -0.5 -0.5 VDDQ+0.5 T -65 STG T J-ABS Max SYMBOL MIN MAX 2.9 1.0 V 0.4 EXTREF SYMBOL θ JA θ SDH 4 10/19/2011 EV1340QI UNITS 4 2 150 °C 150 °C 260 °C 2000 V 500 V UNITS 3.7 V 1 AVIN +85 °C +125 °C TYP UNITS 22 ° ...

Page 5

... With 4mA current sink into P pin OK When pulled up to AVIN (3.3V) with R = 100k AVIN * (196k/(R + 196k); POK POK 2.9V ≤ AVIN ≤ 3.7V 2.9V ≤ AVIN ≤ 3.7 V; Min voltage to ensure the converter is enabled 5 10/19/2011 EV1340QI = 25°C. A MIN TYP MAX UNITS 1.0 1.8 V 2.9 3.3 3.7 V 2.3 V 2.1 V 150 µ ...

Page 6

... Binary Pin Logic Low V B-LOW Threshold Binary Pin Logic High V B-HIGH Threshold ©Enpirion 2011 all rights reserved, E&OE 06218 TEST CONDITIONS Max voltage to ensure the converter is disabled AVIN = 3.6V VDDQOK, EN_PB VDDQOK, EN_PB 6 10/19/2011 EV1340QI MIN TYP MAX UNITS 0.8 V μA 50 0.8 V 1.8 V www.enpirion.com Rev: A ...

Page 7

... VDDQ = 2*V OUT 3.5 4 4.5 5 0.64 0.63 0.62 0.61 0.6 0.59 CONDITIONS CONDITIONS 0.58 AVIN = 3.3V AVIN = 3.3V VDDQ = 1.5V VDDQ = 1.8V 0.57 0. 3 10/19/2011 EV1340QI CONDITIONS CONDITIONS AVIN = 3.3V AVIN = 3.3V VOUT = 0.675V VDDQ = 2*V VDDQ = 1.8V 0.5 1 1.5 2 2.5 3 3.5 4 OUTPUT CURRENT (A) EFFICIENCY vs. OUTPUT CURRENT CONDITIONS AVIN = 3.3V VOUT = 1.5V VDDQ = 1.8V 0.5 1 1.5 2 2.5 3 3.5 4 OUTPUT CURRENT (A) VOUT vs. IOUT VOUT = 0.6V ...

Page 8

... VDDQ = 1.5V AVIN = 3.3V 1.47 1. 3.5 4 4.5 5 0.715 CONDITIONS 0.705 VOUT = 0.675V VDDQ = 2*V 0.695 OUT AVIN = 3.3V 0.685 0.675 0.665 0.655 0.645 0.635 -40 -25 - 10/19/2011 EV1340QI VOUT vs. IOUT VOUT = 0.75V CONDITIONS VDDQ = 2*V 0 0.5 1 1.5 2 2.5 3 3.5 4 OUTPUT CURRENT (A) VOUT vs. IOUT VOUT = 1.5V CONDITIONS VDDQ = 1.8V AVIN = 3.3V 0.5 1 1.5 2 2.5 3 3.5 4 OUTPUT CURRENT (A) VOUT vs ...

Page 9

... Coupled) Shutdown with Enable EN VOUT CONDITIONS VDDQ = 1.5V VOUT = 0.75V IOUT = 5A CSS = 3300pF LOAD 9 10/19/2011 EV1340QI CONDITIONS VDDQ = 1.2V VOUT = 0.6V IOUT = 4A CIN = 1 X 47µF (0805) COUT = 2 x 100 µF (1206) CONDITIONS VDDQ = 1.5V VOUT = 0.75V IOUT = 4A CIN = 1 X 47µF (0805) COUT = 2 x 100 µF (1206) CONDITIONS VDDQ = 1 ...

Page 10

... Load Transient from VOUT (AC Coupled) CONDITIONS VDDQ = 1.3V VOUT = 0.65V CIN = 1 X 47µF (0805) COUT = 2 x 100 µF (1206) LOAD Load Transient from VOUT (AC Coupled) CONDITIONS VDDQ = 1.8V VOUT = 0.9V CIN = 1 X 47µF (0805) COUT = 2 x 100 µF (1206) LOAD 10 10/19/2011 EV1340QI www.enpirion.com Rev: A ...

Page 11

... Functional Block Diagram ©Enpirion 2011 all rights reserved, E&OE 06218 Figure 4: Functional Block Diagram 11 10/19/2011 EV1340QI www.enpirion.com Rev: A ...

Page 12

... POK of the EV1340QI. The VDDQOK’s high logic level voltage is clamped at a diode drop above 2.5V. VDDQOK signal must be high in order for the POK of the EV1340QI to be high. POK Operation The internal EV1340 POK is AND’ed with the VDDQOK input. POK is meant to be used with VDDQOK in a tracking application with VDDQ ramping ...

Page 13

... When the AVIN pin voltage is below a required voltage level (V ) for normal operation, UVLOR converter switching is inhibited. The lock-out threshold has hysteresis to prevent chatter. When the device is operating normally, the AVIN voltage must fall below the lower threshold (V ) for the device to stop UVLOF switching. 13 10/19/2011 EV1340QI www.enpirion.com Rev: A ...

Page 14

... VREF node. Output Voltage Programming and Loop Compensation The output voltage of EV1340QI is determined by the two voltage dividers as shown in the simplified application diagram below: Figure 5: Typical Application Schematic The input voltage divider consisting should be selected to make VREF = 0 ...

Page 15

... ENABLE can be tied to AVIN and come up with it, and VDDQ can be ramped up and down as needed. Alternatively, VDDQ can be brought high after AVIN is asserted, and the device can be turned on and off by toggling the ENABLE pin. 15 10/19/2011 EV1340QI the VDDQ pin. Enpirion the ST Microelectronics ...

Page 16

... Please refer to Figures 8 and 9 while reading the layout recommendations in this section. Recommendation 1: Input and output filter capacitors should be placed on the same side of the PCB, and as close to the EV1340QI package as possible. They connected to the device with very short and wide traces ...

Page 17

... It is highly recommended for all customers to take advantage of this service. sense trace to Please send pdf schematic files and Gerber layout files of the power section to your local sales contact or to Enpirion Applications Support. 17 10/19/2011 EV1340QI , and directly to the The soft-start capacitor C ...

Page 18

... PC board. The PCB top layer under the EV1340 should be clear of any metal lead-frame except for the large thermal pad. The hatched area in Figure 10 represents the area that should be clear of all metal (traces, vias, or planes) on the top layer of the PCB. 18 10/19/2011 EV1340QI mechanically or electrically www.enpirion.com Rev: A ...

Page 19

... Recommended PCB Footprint Figure 11: EV1340 Package PCB Footprint (Top View) ©Enpirion 2011 all rights reserved, E&OE 06218 19 10/19/2011 EV1340QI www.enpirion.com Rev: A ...

Page 20

... Enpirion products are not authorized for use in nuclear control systems, as critical components in life support systems or equipment used in hazardous environment without the express written authority from Enpirion. ©Enpirion 2011 all rights reserved, E&OE 06218 Figure 12: EV1340 Package Dimensions 20 10/19/2011 EV1340QI www.enpirion.com Rev: A ...

Related keywords