gsc24bc01 E-Tech Electronics LTD, gsc24bc01 Datasheet - Page 8

• Manufacturer Part Number: gsc24bc01
• Description: 2-wire Serial Eeproms
• Manufacturer: E-Tech Electronics LTD

Current Address Read: A current address read operation is initiated by issuing R/W=1 in the device address
word (refer to Figure 11). Since the internal address counter maintains the last address incremented by one
accessed during the last read or write operation, the internal address counter will always retain the last
address incremented by one.
Random Read: To access a different address location that the one currently stored in the internal counter, a
random read operation is provided. The random read is actually a combination of a “dummy” byte write
sequence with a current address read command (refer to Figure 12). The “dummy” byte write loads a different
address into the internal counter, and the data can then be accessed using the current address read.
Sequential Read: In order to access subsequent data word after a current address read or random read has
been initiated, the user should send an acknowledgment to the EEPROM chip after each data byte received. If
an acknowledgment is not received, then the chip will not send any more data and expect a STOP condition on
the next cycle to reset back to standby more (refer to Figure 13).
Sequential reads can be used to perform an entire chip read. Unlike the page write operation, the internal
counter will increment to the next row after the last byte of the page has been reached. When the address
reaches the last byte of the last memory page, the next address will increment to the 1
page.
Once the memory address limit is reached, the data word address will “roll over” and the sequential read will
continue. When the microcontroller does not respond with a zero but does generate a following stop condition,
the sequential read operations is terminated.
Figure 11. Current Address Read
Figure 12. Random Read
Figure 13. Sequential Read
GSC24BC01/02/02/04/08/16
(
*
= DON’T CARE bit for 1K)
*
st
ISSUED DATE :2006/06/14
REVISED DATE :
byte of the 1
Page: 8/9
st
memory