gvt73512a8 ETC-unknow, gvt73512a8 Datasheet

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gvt73512a8

Manufacturer Part Number
gvt73512a8
Description
512k X 8 Sram
Manufacturer
ETC-unknow
Datasheet
FEATURES
• Fast access times: 10, 12 and 15ns
• Fast OE# access times: 5, 6and 7ns
• Single +3.3V +0.3V power supply
• Fully static -- no clock or timing strobes necessary
• All inputs and outputs are TTL-compatible
• Three state outputs
• Center power and ground pins for greater noise immunity
• JEDEC standard for functionality and revolutionary pinout
• Easy memory expansion with CE# and OE# options
• Automatic CE# power down
• High-performance, low-power consumption, CMOS
OPTIONS
• Timing
• Packages
• Temperature
Galvantech, Inc. 3080 Oakmead Village Drive, Santa Clara, CA 95051
Tel (408) 566-0688
Rev. 7/98
GALVANTECH
ASYNCHRONOUS
SRAM
double-poly, double-metal process
10ns access
12ns access
15ns access
36-pin SOJ (400 mil)
Commercial
Industrial
Fax (408) 566-0699 Web Site http://www.galvantech.com
MARKING
-10
-12
-15
J
None
I
(
(
0°C
-40°C
, INC.
to
70°C)
to
85°C)
REVOLUTIONARY PINOUT 512K X 8
GENERAL DESCRIPTION
using a four-transistor memory cell with a high performance,
silicon gate, low-power CMOS process. Galvantech SRAMs
are fabricated using double-layer polysilicon, double-layer
metal technology.
improved performance and noise immunity. Static design
eliminates the need for external clocks or timing strobes. For
increased system flexibility and eliminating bus contention
problems, this device offers chip enable (CE#) and output
enable (OE#) with this organization.
enable (WE#) and chip enable (CE#) inputs are both LOW.
Reading is accomplished when (CE#) and (OE#) go LOW
with (WE#) remaining HIGH. The device offers a low power
standby mode when chip is not selected. This allows system
designers to meet low standby power requirements.
The GVT73512A8 is organized as a 524,288 x 8 SRAM
This device offers center power and ground pins for
Writing to these devices is accomplished when write
512K x 8 SRAM
+3.3V SUPPLY
REVOLUTIONARY PINOUT
WE#
VCC
DQ1
DQ2
DQ3
DQ4
VSS
CE#
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
PIN ASSIGNMENT
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
36-Pin SOJ
GVT73512A8
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
Galvantech, Inc. reserves the right to change
products or specifications without notice.
NC
A18
A17
A16
A15
OE#
DQ8
DQ7
VSS
VCC
DQ6
DQ5
A14
A13
A12
A11
A10
NC

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gvt73512a8 Summary of contents

Page 1

... REVOLUTIONARY PINOUT 512K X 8 512K x 8 SRAM +3.3V SUPPLY REVOLUTIONARY PINOUT GENERAL DESCRIPTION The GVT73512A8 is organized as a 524,288 x 8 SRAM using a four-transistor memory cell with a high performance, silicon gate, low-power CMOS process. Galvantech SRAMs are fabricated using double-layer polysilicon, double-layer metal technology. ...

Page 2

... When CE# is HIGH, the chip is disabled and automatically goes into standby power mode. Input Output Enable: This active LOW input enables the output drivers. + Power Supply:3.3V 0.3V Ground 2 GVT73512A8 POWER DOWN DESCRIPTION Galvantech, Inc. reserves the right to change products or specifications without notice. VCC VSS DQ1 DQ8 ...

Page 3

... O < VCC VCC SYM TYP -10 ; VCC =MAX; Icc 90 240 MAX SB1 I 0.1 SB2 CONDITIONS SYMBOL MHz C I VCC = 3.3V C I/O 3 GVT73512A8 MIN MAX UNITS 2.2 VCC+0.5 V -0.5 0 2.4 V 0.4 V 3.0 3.6 V -12 -15 UNITS NOTES 210 175 ...

Page 4

... WP2 WP1 LZWE 3 4 HZWE GVT73512A8 - 15 MAX UNITS NOTES ...

Page 5

... Read Cycle Time. RC 12. Chip Enable and Write Enable can initiate and terminate a WRITE cycle. 13. Capacitance derating applies to capacitance different from the load capacitance shown in Fig. 1. 14. Typical values are measured at 3.3V HZCE is less 5 GVT73512A8 1.5V Fig. 1 OUTPUT LOAD EQUIVALENT 3.3v 317 DQ ...

Page 6

... READ CYCLE NO VALID (7, 8, 10, 12) READ CYCLE NO AOE t LZOE t ACE t LZCE HIGH Z 6 GVT73512A8 3. DATA VALID t HZCE t HZOE DATA VALID DON'T CARE UNDEFINED Galvantech, Inc. reserves the right to change products or specifications without notice. ...

Page 7

... WP2 AS DATA VALID t HZWE (12, 13) WRITE CYCLE NO WP1 AS DATA VALID HIGH Z 7 GVT73512A8 LZWE HIGH DON'T CARE UNDEFINED Galvantech, Inc. reserves the right to change products or specifications without notice. ...

Page 8

... D Q July 7, 1998 Rev. 7/98 , INC. REVOLUTIONARY PINOUT 512K X 8 (12, 13) WRITE CYCLE NO. 3 (Chip Enable Controlled WP1 DATA VALID HIGH Z 8 GVT73512A8 DON'T CARE Galvantech, Inc. reserves the right to change products or specifications without notice. ...

Page 9

... July 7, 1998 Rev. 7/98 , INC. REVOLUTIONARY PINOUT 512K X 8 .941 (23.90) .923 (23.44) .050 (1.27) TYP .020 (0.51) .015 (0.38) MAX or typical, min where noted. MIN 9 GVT73512A8 .445 (11.30) .435 (11.05) .148 (3.76) .138 (3.51) .095 (2.41) .080 (2.03) .380 (9.65) .360 (9.14) Temperature (Blank = Commercial I = Industrial) Speed ( 10 = 10ns 12 = 12ns, 15= 15ns) Package (J = 400 mil SOJ) Galvantech, Inc ...

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