qh25f320s33b8 Numonyx, qh25f320s33b8 Datasheet - Page 34

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qh25f320s33b8

Manufacturer Part Number
qh25f320s33b8
Description
Numonyx? Serial Flash Memory S33
Manufacturer
Numonyx
Datasheet
Figure 16: Timing Diagram for SPI Page Program Command Sequence
8.4.3
Datasheet
34
S#
Q
C
D
Write Enable
For write operations such as the Page Program operation, the single-byte Write Enable
command sequence must be issued to set the WEL bit prior to issuing the Page
Program operation. Without setting the WEL bit, the subsequent Page Program
operation will be ignored. Just as with any other command that alters the configuration,
the Write Enable command is completed on the rising edge of S#. The timing diagram
for a Write Enable command sequence can be found in
Write Enable Command Sequence” on page
0
1
S#
Q
C
D
D6
2
Instruction
Instruction
D5
3
Data Byte 1
Data Byte 1
D4
4
S#
Q
C
D
D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
D3
5
D2 D1 D0
6
Data Byte 3
Data Byte 3
1/Fc
1/Fc
7
A23 A22 A21 A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0 D7 D
40
1/Fc
1/Fc
Address
Address
29 30 31
Data Byte 2
Data Byte 2
2072
35.
Data Byte 256
Data Byte 256
D7
32
Numonyx™ Serial Flash Memory (S33)
Figure 17, “Timing Diagram for
D
1/Fc
1/Fc
48
Order Number: 314822-03
December 2007

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