s4815 Applied Micro Circuits Corporation (AMCC), s4815 Datasheet

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s4815

Manufacturer Part Number
s4815
Description
Oc-48/12/3 Dw/fec/pm And Async Mapper Device With Strong Fec
Manufacturer
Applied Micro Circuits Corporation (AMCC)
Datasheet

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Part Number:
s4815PBI11
Manufacturer:
AppliedM
Quantity:
216
RUBICON-48
OC-48/12/3 DW/FEC/PM and ASYNC Mapper Device with Strong FEC
FEATURES
Easy software migration from industry leading AMCC
NIAGARA FEC device
Backwards compatible with AMCC’s industry leading
S3062 FEC device
G.709 ODU - 1 Synchronous and Asynchronous mapping
G.709 Overhead processing
Ingress and Egress SONET/SDH Performance Monitoring/
Injection
FINAL Information - The information contained in this document is
about a product that has been fully tested, characterized, and is pro-
duction release. All features described herein are supported. Contact
AMCC for updates to this document and the latest product status.
• Significant reuse of the Niagara register map in Rubicon.
• Superb migration path to lower power Rubicon-48 device.
• FEC and Framing compatible between Rubicon-48 and S3062.
• Superb migration path to better integration Rubicon-48 device.
• 1 x OC – 48/STM-16 synchronous and asynchronous mapping
• Bi-directional add-drop ODU – 1.
• Bi-direction G.709 Overhead Processing for bi-directional
• Dedicated GCC ports.
• 1 x OC-/48/12/3 TOH add-drop and processing.
• 8B/10B Monitoring.
• SONET/SDH section and line termination including full B2
• TOH add-drop port.
• LOS, OOF, LOF detection.
• B1, B2 monitoring with programmable Signal Degrade and Sig-
• J0 Monitoring, SDH and SONET modes.
• Support for Protection Switching.
• K1, K2 monitoring for APS changes, line AIS and line RDI.
• Automatic, interrupt-driven, or manual AIS insertion.
• Frame boundary output.
(239,238).
OTU1 regeneration.
recalculation.
nal Fail thresholds.
O T N N e t w o r k / L i n e
O T N N e t w o r k / L i n e
O T N N e t w o r k / L i n e
O T N N e t w o r k / L i n e
S F I - 4 ( 2 . 7
S F I - 4 ( 2 . 7
S F I - 4 ( 2 . 7
S F I - 4 ( 2 . 7
G b p s )
G b p s )
G b p s )
G b p s )
I n t e r f a c e
I n t e r f a c e
I n t e r f a c e
I n t e r f a c e
Empowering Intelligent Optical Networks
A n a l y s i s
A n a l y s i s
A n a l y s i s
A n a l y s i s
P N g e n
P N g e n
P N g e n
P N g e n
P a t t e r n
P a t t e r n
P a t t e r n
P a t t e r n
E r r I n s
E r r I n s
E r r I n s
E r r I n s
R e g i s t e r
R e g i s t e r
R e g i s t e r
R e g i s t e r
& E r r
& E r r
& E r r
& E r r
B Y P A S S
B Y P A S S
B Y P A S S
B Y P A S S
M a p
M a p
M a p
M a p
B Y P A S S
B Y P A S S
B Y P A S S
B Y P A S S
8 o r 1 6
1 6
8 o r 1 6
1 6
u P I / F
u P I / F
u P I / F
u P I / F
D e c o d e r
D e c o d e r
D e c o d e r
D e c o d e r
E n c o d e r
E n c o d e r
E n c o d e r
E n c o d e r
Figure 1: Block Diagram
E F E C
E F E C
E F E C
E F E C
E F E C
E F E C
E F E C
E F E C
I n t e r r u p t
I n t e r r u p t
I n t e r r u p t
I n t e r r u p t
C o n t r o l
C o n t r o l
C o n t r o l
C o n t r o l
I n g r e s s /E g r e s s
I n g r e s s /E g r e s s
I n g r e s s /E g r e s s
I n g r e s s /E g r e s s
O D U - 1 O H
O D U - 1 O H
O D U - 1 O H
O D U - 1 O H
A d d / D r o p
A d d / D r o p
A d d / D r o p
A d d / D r o p
B Y P A S S
B Y P A S S
B Y P A S S
B Y P A S S
Industry Standard RS(255,239)
6.2 dB Coding Gain
Enhanced Gain Forward Error Correction with G.709 ODU
Broad Interface Compatibility
Support For System Test and Diagnostics
General Purpose Processor Interface
• G.709 Compliant Frame Structure.
• Compatible with AMCC’s S19203 (HUDSON) and S19208
• Limited backwards compatibility with AMCC’s S3062.
• 2.7 Gbps enhanced FEC with > 8.6 dB coding gain.
• G.709 overhead processing and nominal rate expansion.
• Comprehensive channel statistics gathering including.
• 16-bit 155Mbps LVDS interface
• 4-bit 622Mbps LVDS interface
• Compatible with AMCC’s DANUBE, MISSOURI, OHIO,
• Provides port swapping and output dual feed features for 1 + 1
• Can synthesize SONET frames.
• Error injection capability for verification of remote error report-
• Test-set compliant pseudo-random sequence generation/anal-
• Client and Line side loopback.
• Glueless 16-bit interface to MPC860, 25 MHz to 66 MHz. Dual
• Interrupt driven or Polled mode operation.
B Y P A S S
B Y P A S S
B Y P A S S
B Y P A S S
(NIAGARA).
RHINE, VOLTA, S3465, S3457, S3455, S3086 and S3485.
line protection scheme.
ing.
ysis.
mode interface also supports Intel processors.
P M
P M
P M
P M
• Corrected zeros, ones (with outputs).
• Uncorrectable sub-frame count.
• Corrected bits, bytes.
I n g r e s s E g r e s s
I n g r e s s E g r e s s
I n g r e s s E g r e s s
I n g r e s s E g r e s s
T O H A d d / D r o p
T O H A d d / D r o p
T O H A d d / D r o p
T O H A d d / D r o p
P M
P M
P M
P M
S O N E T / S D H
S O N E T / S D H
S O N E T / S D H
S O N E T / S D H
E n c o d e r
E n c o d e r
E n c o d e r
E n c o d e r
D e c o d e r
D e c o d e r
D e c o d e r
D e c o d e r
F E C
F E C
F E C
F E C
F E C
F E C
F E C
F E C
R - S
R - S
R - S
R - S
R - S
R - S
R - S
R - S
B Y P A S S
B Y P A S S
B Y P A S S
B Y P A S S
B Y P A S S
B Y P A S S
B Y P A S S
B Y P A S S
Part Number S4815PBI, Revision 2.2, May 2006
A n a l y s i s
A n a l y s i s
A n a l y s i s
A n a l y s i s
P N g e n
P N g e n
P N g e n
P N g e n
P a t t e r n
P a t t e r n
P a t t e r n
P a t t e r n
E r r I n s
E r r I n s
E r r I n s
E r r I n s
& E r r
& E r r
& E r r
& E r r
(at 10
C l i e n t o r O T N
C l i e n t o r O T N
C l i e n t o r O T N
C l i e n t o r O T N
S F I- 4
S F I- 4
S F I- 4
S F I- 4
( 2 . 7 G b p s )
( 2 . 7 G b p s )
( 2 . 7 G b p s )
( 2 . 7 G b p s )
-15
I n t e r f a c e
I n t e r f a c e
I n t e r f a c e
I n t e r f a c e
CER)
Forward Error Correction
Product Brief
with

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s4815 Summary of contents

Page 1

... Empowering Intelligent Optical Networks Product Brief Part Number S4815PBI, Revision 2.2, May 2006 Forward Error Correction -15 (at 10 CER ...

Page 2

... FEC encoders. This capability increases the flexibility of a single board design used in a variety of modes. Empowering Intelligent Optical Networks Product Brief Part Number S4815PBI, Revision 2.2, May 2006 ...

Page 3

... ODU-1 payload and appends the GFEC or EFEC code necessary for transport. The PHY interface is achieved with the S3485 CMOS transciever. Figure 2: Multi-Protocol LAN Transport Volta-48 Volta-48 Rubicon-48 Rubicon-48 Empowering Intelligent Optical Networks Product Brief Part Number S4815PBI, Revision 2.2, May 2006 S3485 S3485 1 x OTU1 1 x OTU1 2.7GHz 2.7GHz 3 ...

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