lc895196 Sanyo Semiconductor Corporation, lc895196 Datasheet - Page 10

• Manufacturer Part Number: lc895196
• Description: Ata-pi Compatible Cd-rom Decoder Ic
• Manufacturer: Sanyo Semiconductor Corporation

Pin Descriptions
1. ATAPI
2. Microcontroller Interface
ZCS1FX (input)
ZCS3FX (input)
DA0 to DA2 (input)
ZDASP (input/output)
DD0 to DD15 (input/output)
ZDIOR (input)
ZDIOW (input)
ZDMACK (input)
DMARQ (output)
HINTRQ (output)
ZIOCS16 (output)
IORDY (output)
ZPDIAG (input/output)
ZHRST (input)
ZINT1 (output)
CSEL (input)
ZCS (input)
CSCTRL (input)
ZRD, ZWR, SUA0 to SUA6 (inputs)
ZSWAIT (output)
Chip select signal for selecting the command block register.
Chip select signal for selecting the control block register.
Addresses for accessing the various ATAPI addresses.
Drive 1 is output and drive 0 is input.
Signal for indicating the existence of drive 1 to drive 0. Attach external pull-up resistors.
16-bit data bus. Can be used for transferring 8 bit and 16 bit data.
Read strobe signal from the host.
Write strobe signal from the host.
During DMA transmission, this is the acknowledged signal from the host responding to the DMARQ drive request
signal. There is no built-in pull-up resistor.
This is the drive request signal during DMA transmission.
Drive interrupt signal to the host.
This signal is asserted depending on the drive when the drive can support 16-bit transfers. This signal is not asserted
during DMA transfers.
This signal indicates that the drive is ready to respond during data transfer. This signal is low if the drive is not ready.
Attach an external pull-up resistor.
This signal is asserted by drive 1 to inform drive 0 that the diagnostics are complete. Attach an external pull-up
resistor.
This is the reset signal from the host. Applying a low signal to this pin causes ZRSTIC to go low and resets the drive.
There is no built-in pull-up resistor.
This is the interrupt request signal from the IDE block to the MC.
This is the cable select signal that determines master/slave. Attach an external pull-up resistor.
This is the MC-side chip select.
This signal selects the MC-side chip select logic.
These are the MC interface control signals. Addressing uses SUA0 to SUA6.
When the microcontroller accesses the RAM, the SUB-CPU must wait while this pin is low.
High: ZCS is active low
Low: ZCS is active high
LC895196
No. 5737-10/12