lc7872e Sanyo Semiconductor Corporation, lc7872e Datasheet - Page 15

• Manufacturer Part Number: lc7872e
• Description: Cd Graphics Decoder
• Manufacturer: Sanyo Semiconductor Corporation

Register 3 (on/off settings for channels 8 to 15)
Register 4 (BGC R and G setting)
Register 5 (BGC B setting)
Register 6 (chroma key color R and G settings)
Register 7 (chroma key color B setting)
Register 8 (burst phase setting, only valid when SON = 1)
Register 9 (YS and TRANS output timing)
Register 10 (External synchronization on/off, test mode)
Register 11 (subtitle scrolling, vertical)
Register 12 (subtitle scrolling, horizontal)
Register 13 (TRANS setting, only valid when SON = 1)
Data: lsb
Data: lsb
Data: lsb
Data: lsb
Data: lsb
Data: lsb
Data: lsb
Data: lsb
Data: lsb
Data: lsb
Data: lsb
C = channel 8 to 15
This setting allows the subtitle screen display position to be scrolled in font height units.
V = vertical (up) scrolling distance (0 to 17 font height units)
This setting allows the subtitle screen display position to be scrolled in font width units.
H = horizontal (left) scrolling distance (0 to 49 font width units)
[ C C C C C C C C ]
[ R R R R G G G G ]
[ B B B B - - - - ]
[ R R R R G G G G ]
[ B B B B - - - - ]
[ F F - - - - - P ]
[ T T T - - - - - ]
[ T T T - - Y S R ]
[ V V V V V - - - ]
[ H H H H H H - - ]
[ B B B B B B - P ]
T = phase setting. The phase difference between YS and TRANS (the digital output) and the
video signal can be set to one of 8 levels from 0 to 7 in units of single 4FSC clock cycles. At a
value of 4 the phase is identical to that of the VIDEO pin.
T = test mode setting
R = 0:Only the display area is moved
S = 0:Normal
Y = 0:Resets HRESET and VRESET when an external clock is used (SON = 1)
Note: * In this state the define transparency command will not be accepted. (Return the system
B = the BGC TRANS value
P = 1: Enables the TRANS setting.
1:Motion also includes the border area (only left/right motion supported)
1:Initializes the TLUT contents to all 0.*
1:Resets VRESET when an external clock is used (SON = 1) (HRESET is not required)
0: off
1: on
0: Invalid
(The whole screen is displayed and burst goes to the CDG side.)
to the S = 0 state.)
msb; Default:
msb; Default:
msb; Default:
msb; Default:
msb; Default:
msb; Default:
msb; Default:
msb; Default:
msb; Default:
msb; Default:
msb; Default:
[ 0 0 0 0 0 0 0 0 ]
[ 0 0 0 0 0 0 0 0 ]
[ 0 1 0 1 - - - - ]
[ 0 0 0 0 0 0 0 0 ]
[ 0 0 0 0 - - - - ]
[ 0 0 - - - - - 0 ]
[ 0 0 1 - - - - - ]
[ 0 0 0 - - - 0 0 ]
[ 0 0 0 0 0 - - - ]
[ 0 0 0 0 0 0 - - ]
[ 0 0 0 0 0 0 - 1 ]
LC7872E
No. 4868-15/17