SDA9489X ETC [List of Unclassifed Manufacturers], SDA9489X Datasheet - Page 37

• Manufacturer Part Number: SDA9489X
• Description: PIP IV Advanced SOPHISTICUS High-End Picture-In-Picture ICs
• Manufacturer: ETC [List of Unclassifed Manufacturers]

SDA 9489X
SDA 9589X
the clamping and blanking pulse because of the modified clock frequency, but the pulse
length is kept nearly constant.
Figure 4-20 PIP horizontal blanking timing
Table 4-21
4.10.1
The pedestal level adjustment controlled by I
enables the correction of small offset errors, possibly appearing at the successive
blanking stage of RGB processor. This adjustment has an effect on the setup level
during the active line interval of each channel like the brightness adjustment but has an
Micronas
BLANKP
HSP
CLAMPP
Parent
Video
allowed
HSP range
READD
0
0
0
0
1
1
1
1
D2
0
1
0
1
0
1
0
1
Pedestal Level Adjustment
CLPDEL
PIP horizontal blanking timing
D1
0
1
0
1
0
1
0
1
D0
0
1
0
1
0
1
0
1
a
c
D1
CLPLEN
0
0
0
0
0
0
0
0
256 T
D0
0
0
1
1
0
0
1
1
b
Blanking
a ( ← s)
-11.0
Start
-1.5
-1.5
-0.8
-5.5
-0.8
-5.5
-11
d
2
C signals BLKLR, BLKLG, BLKLB
Blanking
Duration
b ( ← s)
10.5
10.5
7.9
7.9
5.3
5.3
4
4
Preliminary Data Sheet
Clamping
System Description
c ( ← s)
Start
-3.6
-6.4
-7.3
-3.2
2.2
1.5
1.1
3
Clamping
Duration
d ( ← s)
3.8
3.8
2.5
2.5
1.9
1.9
5
5
4-37