em78p5842 ELAN Microelectronics Corp, em78p5842 Datasheet
em78p5842
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em78p5842 Summary of contents
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... EM785840/5841/5842 8-BIT MICRO-CONTROLLER Version 1.2 ELAN MICROELECTRONICS CORP. st No. 12, Innovation 1 RD., Science-Based Industrial Park Hsin Chu City, Taiwan, R.O.C. TEL: (03) 5639977 FAX: (03) 5630118 ...
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... CNT1(**) 8 bit counter CNT2(**) STACK ** CNT2 is only exist on EM78P5840/41/42 and EM785840/41/42, CNT2 is un-support on ICE5840. OTP Mask EM78P5840 EM785840 EM78P5841 EM785841 EM78P5842 EM785842 PACKAGE 18 pin PDIP 18 pin SOP 20 pin PDIP 20 pin SOP 24 pin PDIP 24 pin SOP EM785840 series 256 byte NA Under 6M Hz ...
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... Table4: Differences between EM78P5840, EM78P5841 and EM78P5842: EM78P5840 Pin count PWM IO (MAX) User Application Note (Before using this chip, take a look at the following description note, it includes important messages.) 1. There are some undefined bits in the registers. The values in these bits are unpredicted. These bits are not allowed to use. We use the symbol “ ...
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I. General Description The EM785840 series are 8-bit RISC type microprocessor with low power, high speed CMOS technology. There are 4Kx13 bits ROM within it. This integrated single chip has an on_chip watchdog timer (WDT), RAM, programmable real time clock/counter, ...
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III. Application General products application. IV. Pin Configuration CIN/P94 PLLC/ERIC /P70/INT0 AD6/P65 AD5/P64 AD4/P63 CIN/P94 1 20 P95 P96 AVDD 4 17 PLLC/ERIC 5 16 /P70/INT0 6 15 AVSS AD6/P65 AD5/P64 9 ...
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V. Functional Block Diagram CPU TIMING CONTROL TIMER TCC COUNTER1 COUNTER2 WDT ROM XIN XOUT PLLC Oscillator timing control R1(TCC) Control sleep and wakeup on I/O port IOC6 R6 PWM PORT6 10-bit A/D P60~P61 P62~P66 __________________________________________________________________________________________________________________________________________________________________ * This specification is ...
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VI. Pin Descriptions PIN I/O POWER AVDD POWER AVSS POWER CLOCK XIN I XOUT O PLLC I OSC I CIN I 10-bit 8 channel A/D VREF I (P66) AD1 I (P90) AD2 I (P91) AD3 I (P62) AD4 I (P63) ...
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VII. Functional Descriptions VII.1 Operational Registers Register configuration Addr R PAGE0 R PAGE1 00 Indirect addressing 01 TCC Page, Status 04 RAM bank, RSR 05 Program ROM page 06 Port6 I/O data 07 Port7 I/O data ADC ...
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IOC PAGE registers Addr IOC PAGE0 IOC PAGE1 Port6 I/O control Port6 switches 07 Port7 I/O control Port7 pull high 08 09 Port9 I/O control 0A 0B ADC control 0C 0D Clock source ...
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R2, A" allows the loading of an address from the A register to the PC, and the ninth and tenth bits are cleared to "0''. "ADD R2,A" allows a relative address be added to the current PC, and contents ...
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Bit 6~Bit 7(RPAGE0 ~ RPAGE1): change another page Please refer to VII.1 Operational registers for detail register configuration. (RPAGE1,RPAGE0) (0,0) (0,1) (1,0) (1,1) R4 (RAM selection for common registers R20 ~ R3F)) (RAM selection register) 7 ...
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Bit 2 ~ Bit 3 ( T2P0 ~ T2P1 ): TMR2 clock prescale option bits. T2P1 T2P0 Bit 4 (T1EN): TMR1 enable bit 0 Î TMR1 is off (default value). 1 Î ...
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R7 (PORT7 I/O data, ADC, Duty cycle of PWM ) PAGE0 (PORT7 I/O data register P76 P75 - R/W R/W Bit0 (P70): PORT70 is a multi-function pin. In Crystal mode, by setting P70S in code option, ...
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R9 (PORT9 I/O data) PAGE0 (PORT9 I/O data register P97 P96 P95 R/W R/W R/W Bit 0 ~ Bit 7 (P90 ~ P97) : 8-bit PORT9(0~7) I/O data register User can use IOC register to define input ...
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If enable PLL, CPU will operate at normal mode (high frequency). Otherwise, it will run at green mode (low frequency, 32768 Hz). PLL circuit Sub-clock 32.768kHz Bit 7: Unused register. Always keep this bit some un-expect error ...
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RB (ADC input data buffer) PAGE0 : (undefined) not allowed to use PAGE1 (ADC output data register AD7 AD6 AD5 Bit 0 ~ Bit 7 (AD0 ~ AD7) : The last significant 8 bit ...
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PAGE 2,3 (undefined) not allowed to use. RE (Interrupt flag) PAGE0 (Interrupt flag PWM2 0 ADI R/W-0 R/W-0 R/W-0 Bit0 ~ Bit3, Bit6: These four bits must clear unable to expect error will occur ...
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VII.3 Special Purpose Registers A (Accumulator) Internal data transfer, or instruction operand holding It's not an addressable register. CONT (Control Register P70EG INT TS R/W-1 R/W-0 R/W-1 Bit 0 ~ Bit 2 (PSR0 ~ PSR2) : TCC/WDT ...
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OSCM1,0 PLL Output IRC2 oscillator ERC oscillator IRC1 (32K) IOC5 (undefined) not allowed to use.(This page is not sure IOC6 (PORT6 I/O control, P6* pins switch control) PAGE0 (PORT6 I/O control register ...
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P90 (I/O PORT90) pin is selected 1 Î AD1 (Channel 1 input of ADC) pin is selected Bit 1(P91S) : Select normal I/O PORT91 pin or channel 2 input AD2 pin of ADC 0 Î P91 (I/O PORT91) ...
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IOC8 (Unused), not allowed to use IOC9 (PORT9 I/O control, PORT9 switches) PAGE0 (PORT9 I/O control register IOC97 IOC96 IOC95 R/W-1 R/W-1 R/W-1 Bit 0 ~ Bit 7 (IOC90 ~ IOC97) : PORT9(0~7) I/O direction control register ...
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ADCLK1 ADCLK0 Please avoid AD converter rate over 50K Hz, it maybe decrease ADC’s resolution. This is a CMOS multi-channel 10-bit successive approximation A/D converter. Features 74.6kHz maximum conversion speed (Crystal ...
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PAGE1 (PORT switch R/W-0 R/W-0 R/W-0 Bit 0: Always set this bit to “1” otherwise partial ADC function cannot be used) Bit 1 ~ Bit 7: (undefined) not allowed to use IOCD (TONE1 control, ...
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IOCE (Interrupt mask,) PAGE0 (Interrupt mask PWM2 0 ADI R/W-0 - R/W-0 Bit 0 ~ Bit 3, Bit 6 : unused Bit 4(PWM1) : PWM1 one period reach interrupt mask. Bit 5 (ADI) : ADC conversion complete ...
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IOCF (Interrupt mask) (Interrupt mask register) Bit7 Bit6 Bit5 INT3 X X R/W Bit 0~1; 3~4 ; Bit 7 : interrupt enable bit 0 Î disable interrupt 1 Î enable interrupt Bit 2, 5~6 : (remain these values ...
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VII.4 I/O Port The I/O registers are bi-directional tri-state I/O ports. The I/O ports can be defined as "input" or "output" pins by the I/O control registers under program control. The I/O data registers and I/O control registers are both ...
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VII.5 RESET The RESET can be caused by (1) Power on reset (2) WDT timeout. (if enabled and in GREEN or NORMAL mode) (3) /RESET pin pull low (At P71S = 1). Once the RESET occurs, the following functions are ...
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VII.8 Instruction Set Instruction set has the following features: (1) Every bit of any register can be set, cleared, or tested directly. (2) The I/O register can be regarded as general register. That is, the same instruction can operates on ...
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0 0100 11rr rrrr 04rr 0 0101 00rr rrrr 05rr 0 0101 01rr rrrr 05rr 0 0101 10rr rrrr 05rr 0 0101 11rr rrrr 05rr 0 0110 00rr rrrr 06rr 0 0110 01rr rrrr 06rr 0 0110 10rr rrrr 06rr ...
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VII.9_1 Code Option EM785840 CODE Option Register P71S P70S OSCM1 OSCM0 IRC2S Bit 3(MER) : Memory error recover function 0 Î disable memory error recover function 1 Î enable memory ...
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VII.10 PWM (Pulse Width Modulation) (1) Overview In PWM mode, both PWM1 and PWM2 pins produce 10-bit resolution PWM output (see. Fig.10 for the functional block diagram). A PWM output has a period and a duty cycle, ...
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TMRX is cleared. • The PWMX pin is set to 1. • The PWM duty cycle is latched from DT1/DT2 to DTL1/DTL2. < Note > The PWM output will not be set, if the duty cycle is 0; • ...
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Fosc 1:2 1:8 MUX 1:32 1:64 T1P0 T1P1 T1EN Data Bus T2P0 T2P1 T2EN Fosc 1:2 1:8 MUX 1:32 1:64 • Fosc: Input clock. • Prescaler (T1P0 and T1P1): Options of 1:2, 1:8, 1:32, and 1:64 are defined by TMRX. ...
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VII.11 Oscillator The EM785840 can be operated in two different oscillator modes, each of them are crystal mode and RC mode. Users can select one of them by setting code option. The descript of these two oscillator mode are as ...
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IRC mode: For some applications that do not require precise timing calculation, the RC oscillator could offer users with an effective cost savings. EM785840 offer a versatile internal RC mode with default frequency value of 4M and 2MHz. In ...
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RESET operation Fig 15: The relative of IRC and ERIC mode’s normal and sleep mode VII.12 Power on Considerations Any micro-controller is not guaranteed to start to operate properly before the power supply stabilizes at its steady states. EM785840 power ...
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POR reset voltage is influenced in process or temperature. For some application, a constant reset voltage is important. Next circuit will support a adjust reset voltage. By adjusting R41 and R46, POR reset voltage will be a constant (Vpor) and ...
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VIII. Absolute Operation Maximum Ratings RATING DC SUPPLY VOLTAGE INPUT VOLTAGE OPERATING TEMPERATURE RANGE IX. DC Electrical Characteristic (Ta = 25qC, AVDD=VDD=5Vr5%, VSS=0V) Parameter Symbol Input leakage current for input pins Input leakage current for bi- directional pins Input high ...
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XI. AC Electrical Characteristic CPU instruction timing (Ta = 25qC, AVDD=VDD=5V, VSS=0V) Parameter Symbol Input CLK duty cycle Instruction cycle time Device delay hold time TCC input period Watchdog timer period Note 1: N= selected prescaler ratio. ADC characteristic (VDD ...
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VDD Power on reset /RES E T Program Active The relative between OSC stable time and power on reset EM785840 operation voltage(X axis Æ min VDD ; Y axis Æ main CLK): 14.3 3.58 Fig.18 The relative ...
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EM785840’s 10 bit ADC characteristic EM785840 build in 10 bit resolution, multi channel ADC function. In ideal, if ADC’s reference voltage is 5V, the ADC’s LSB will be 5V/1024. But in practical, for some physics or circuit’s character, some un-ideal ...
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XII. Timing Diagrams ins __________________________________________________________________________________________________________________________________________________________________ * This specification is subject to change without notice. Fig.20 AC timing 40 EM785840/5841/5842 8-bit Micro-controller 2004/11/10 V1.2 ...
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Appendix: Package spec of EM78P5840/5841/5842 EM785840M EM785840P __________________________________________________________________________________________________________________________________________________________________ * This specification is subject to change without notice. EM785840/5841/5842 8-bit Micro-controller 41 2004/11/10 V1.2 ...
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EM785841M EM785841P __________________________________________________________________________________________________________________________________________________________________ * This specification is subject to change without notice. EM785840/5841/5842 8-bit Micro-controller 42 2004/11/10 V1.2 ...
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EM785842M EM785842P __________________________________________________________________________________________________________________________________________________________________ * This specification is subject to change without notice. EM785840/5841/5842 8-bit Micro-controller 43 2004/11/10 V1.2 ...