em78p809n ELAN Microelectronics Corp, em78p809n Datasheet - Page 31

• Manufacturer Part Number: em78p809n
• Description: 8-bit Microcontroller
• Manufacturer: ELAN Microelectronics Corp

Product Specification (V1.0) 07.26.2005
(This specification is subject to change without further notice)
4.4 CPU Operation Mode
Registers for CPU operation mode
* R_BANK: Register Bank (bits 7, 6 of R3), R/W: Read/Write
R_BANK
Fosc: Oscillates
BANK 0
IDLE MODE
CPU : Halts
Bit 3 ( TBIE ) : Time base timer interrupt enable bit.
Bit 2 ( EXIE1 ) : External INT 1 Interrupt enable bit.
Bit 0 ( TCIE0 ) : TCC Interrupt enable bit.
to "1".
instruction.
Individual interrupt is enabled by setting its associated control bit in the IMR2
Global interrupt is enabled by the ENI instruction and is disabled by the DISI
IMR2 register is both readable and writable.
TCIE0 = “0” : disable TCIF0 interrupt
TCIE0 = “1” : enable TCIF0 interrupt
TBIE = “0” : disable TBIF interrupt
TBIE = “1” : enable TBIF interrupt
EXIE1 = “0” : disable EXIF1 interrupt
EXIE1 = “1” : enable EXIF1 interrupt
Address
0X05
SIS=0 + SLEP
Interrupt
Fig 5. Operation Mode and Switching
NAME
SCR
Bit 7 Bit 6 Bit 5
NORMAL MODE
CPU : Operating
Fosc: Oscillates
0
--
Reset Occurs
PS2
R/W
PS1
R/W
Bit 4 Bit 3 Bit 2
SIS=1 + SLEP
/SLEEP Pin Input
R/W
PS0
0
--
8-Bit Microcontroller
--
1
SLEEP MODE
EM78P809N
Fosc: Stops
CPU : Halts
Bit 1 Bit 0
R/W
SIS
REM
R/W
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