em78p862a ELAN Microelectronics Corp, em78p862a Datasheet - Page 15

• Manufacturer Part Number: em78p862a
• Description: 8-bit Risc Type Microprocessor
• Manufacturer: ELAN Microelectronics Corp

This specification is subject to change without further notice.
NOTES: P7.0 ~ P7.3 wake-up function is controlled by IOCF (1, 2, 3, 7) and ENI instruction.
6.1.12 RB (Reserved)
Bit 0 ~ 7: Reserved. Set Bit 7 to Bit 0 to ‘1’
6.1.13 RC (2K RAM Address)
Bit 0 ~ 7: Select data bank RAM address of up to 256. IOCA is the register for bank selection.
6.1.14 RD (2K RAM Data)
Bit 0 ~ 7: 2K bytes RAM data transfer register
6.1.15 RE (LCD Driver, WDT Control)
Bit 0:
RAM_D7 RAM_D6 RAM_D5 RAM_D4 RAM_D3 RAM_D2 RAM_D1 RAM_D0
RAM_A7 RAM_A6 RAM_A5 RAM_A4 RAM_A3 RAM_A2 RAM_A1 RAM_A0
Wakeup Signal
TCC Time-Out
WDT Time-Out
Port 9
Port 7.0 ~ 7.3
Bit 7
Bit 7
Bit 7
Bit 7
1
0
P7.0 wakeup signal is a RISING or FALLING signal defined by CONT register Bit 7.
Port 9, Port 7.1, Port 7.2, and Port 7.3 wake-up signals are a FALLING EDGE signal.
X=Don’t care
(LCD_M) LCD_M defines the LCD control methods, including duty (see table next
page).
Refer to Section 6.2.8; IOCA Register on how to select RAM bank.
WDTE
Bit 6
Bit 6
Bit 6
Bit 6
1
RA(7,6)=(0,0)
+ SLEP
SLEEP Mode
WUP9H
RESET
RESET
Bit 5
Bit 5
Bit 5
Bit 5
X
X
1
WUP9L
Bit 4
Bit 4
Bit 4
Bit 4
1
NOTE
RA(7,6)=(1,0)
+ SLEP
Wake-up
+ Interrupt
+ Next instruction
Wake-up
+ Next instruction
Wake-up
+ Next instruction
Wake-up
+ Interrupt
+ Next instruction
IDLE Mode
Bit 3
Bit 3
Bit 3
Bit 3
1
0
LCD_C2
RA(7,6)=(x,0)
no SLEP
GREEN Mode
8-Bit RISC Type Microprocessor
Bit 2
Bit 2
Bit 2
Bit 2
1
Interrupt
Interrupt
RESET
X
LCD_C1
Bit 1
Bit 1
Bit 1
Bit 1
08.02.2004 (V1.0)
1
NORMAL Mode
RA(7,6)=(x,1)
no SLEP
Interrupt
Interrupt
EM78862B
LCD_M
RESET
Bit 0
Bit 0
Bit 0
Bit 0
X
1
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