SL1461KG MITEL [Mitel Networks Corporation], SL1461KG Datasheet - Page 4

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SL1461KG

Manufacturer Part Number
SL1461KG
Description
Wideband PLL FM Demodulator
Manufacturer
MITEL [Mitel Networks Corporation]
Datasheet
4
SL1461SA
ABSOLUTE MAXIMUM RATINGS
FUNCTIONAL DESCRIPTION
optimised for application in satellite receiver systems and
requiring a minimum external component count. It contains all
the elements required for construction of a phase locked loop
circuit, with the exception of tuning components for the local
oscillator, and an AFC detector circuit for generation of error
signal to correct for any frequency drift in the outdoor unit local
oscillator. A block diagram is contained in Fig. 2 and the typical
application in Fig. 3.
typically 402 or 479.5MHz is fed to the RF preamplifier, which
has a working sensitivity of typically -40 dBm, depending on
application and layout. The preamplifier contains an RF level
detect circuit, which generates an AGC signal that can be used
for controlling the gain of the IF amplifier stages, so maintaining
a fixed level to the RF input of the SL1461SA, for optimum
threshold performance. The bias point of the AGC circuit can
be adjusted to cater for variation in AGC line voltage
requirement and device input power. The typical AGC curves
are shown in Fig. 9. It is recommended that the device is
operated with an input signal between -30 and -35dBm. This
MP16 package thermal resistance,
chip to case
Power consumption at 5.5V
ESD protection - pins 1 to 15
ESD protection - Pin 16
All voltages are referred to V
The SL1461SA is a wideband PLL FM demodulator,
The internal pin connections are contained in Fig.6/6a
In normal applications the second satellite IF frequency of
Characteristics
2K
AGC BIAS
RV1
BB515
BB515
D2
D1
EE
4n7
at 0V
TP3
C6
470nF
C5
50K
cont.
Min.
1.7
2
5K1
R2
47nF
4K7
4K7
C1
Fig.3 Standard application circuit
AFC WINDOW ADJUST
RV2
R3
R1
C7
RF INPUT
Typ.
250
41
1nF
100nF
2
3
4
5
6
7
8
1
C2
Max.
ensures optimum linearity and threshold performance, and
gives a good safety margin over the typical sensitivity of
-40dBm.
which is of balanced design for low radiation. In this stage the
RF signal is mixed with the local oscillator frequency, which is
generatedby an on–board oscillator. The oscillator block uses
an external varactor tuned sustaining network and is optimised
for high linearity over the normal deviation range. A typical
frequency versus voltage characteristic for the oscillator is
contained in Fig. 7. The loop output is designed to compensate
for first order temperature variation effects; the typical stability
is shown in Fig. 8
around which feedback is applied to determine loop transfer
characteristic . Feedback can be applied either in differential or
single ended mode; if the appropriate phase detector gains are
assumed in calculating loop filters, both modes should give the
same loop response.
amplifier, which can either be connected to a 75 load or used
to drive a high input impedance stage giving greater linearity
and approximately 6dB higher demodulated signal output
level.
mW
C/W
kV
kV
16
16
15
14
13
12
11
10
9
The output of the preamplifier is fed to the mixer section
The output of the mixer is then fed to the loop amplifier
The loop amplifier drives a 75 output impedance buffer
27K
C8
Mil-std-883 method 3015 class 1
Mil-std-883 method 3015 class 1
1K2
1K2
R5
R4
R6
1nF
TP4
C9
47 F
100pF
100nF
C10
C11
100pF
TP2
TP1
C3
Conditions
47 F
C4
VIDEO OUTPUT
1nF
C12
+5V

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