ATSAM2195 ATMEL [ATMEL Corporation], ATSAM2195 Datasheet
ATSAM2195
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ATSAM2195 Summary of contents
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... Operating – Single 3.3V or Single 1.8V Power Supply – Built-in Power Switch and 3.3V to 1.8V Regulator 1. Typical Hardware Configuration Figure 1-1. Typical Hardware Configuration MIDI In Parallel MIDI Audio ATSAM2195 OUT Audio Processing ATSAM2195 Low-power Single Chip Synthesizer with Effects 6308A–DRMSD–10-May-07 ...
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... AGND 43, 44 VA33 4 VA18 2 REGIN 34 PWRIN 38 ATSAM2195 2 Type Function DIGITAL GROUND PWR All pins should be connected to a ground plane DIGITAL GROUND Ground supply; down bonded to the exposed die pad (heatsink PWR recommended, but not obligatory, to connect this pad to a ground plane during ...
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... It should be left unconnected if not used. Write, active low. When CS and WR are low, data (A0=0) or control (A0= written from the D0-D7 bus to the ATSAM2195 on the rising edge of WR. This pin has a built-in pull up. It should be left unconnected if not used. A rising edge indicates that a MIDI byte is available for read on D0-D7. ...
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... OUTVC18 35 PWROUT 39 PDWN 37 TEST0-TEST1- 36, 27, 32 TEST2 ATSAM2195 4 Type Function 9.6 MHz crystal connection. An external 9.6 MHz clock can also be used (1.95Vpp max through 47 pF capacitor). X2 cannot be used to drive external circuits. Reset input, active low. This is a Schmitt trigger input, allowing direct connection ...
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... Pin Name Pin# Pin Name IRQ D1 27 TEST1 VD18 30 VD18 GND 31 GND VD33 32 TEST2 D4 33 GND ATSAM2195 Pin# Pin Name 34 REGIN 35 OUTVC18 36 TEST0 37 PDWN 38 PWRIN 39 PWROUT 40 VCM 41 VREF 42 AGNDREF 43 AGND 44 AGND 5 ...
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... Mechanical Dimensions – 44-lead QFN Package Notes: 1. All package dimensions are in mm. 2. R-QFN044_D - QFN ATSAM2195 6 6308A–DRMSD–10-May-07 ...
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... Marking 6308A–DRMSD–10-May-07 FRANCE SAM2195 YYWW 58A60B XXXXXXXXX Pin 1 ATSAM2195 7 ...
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... Maximun IOH per I/O pin ........................................... 4 mA Maximum Output current from PWROUT pin (max duration = 1sec) (IPWRO) ............................ 650 mA Maximum Output current from OUTVC18 pin (max duration = 1sec) (IREGO) ............................. 100 mA ATSAM2195 8 *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. ...
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... VD33 1.65 1.8 VD18 1.65 1.8 VA33 3 3.3 VA33 1.65 1.8 VA18 1.65 1.8 PWRIN 1.75 1.80 REGIN 2.7 3.3 IPWRO - - IREGO - VD18 < 1.95V) < Symbol Min Typ VIL -0.3 - VIH 2 - VIL -0.3 - VIH 1.2 - VOL - - VOH VD33-0 <1 - VREGO 1.65 1.8 ATSAM2195 Max Unit 3.6 V 1.95 V 1.95 V 3.6 V 1.95 V 1.95 V 1.95 V 3.6 V 217 +70 °C Max Unit 0.8 V 3.6 V 0.3 V VD18+0 µA 0 ...
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... VA33 = 3.3V, OUTLEV = 1 VA33 = 1.8V or 3.3V, OUTLEV = 0 AC-Load resistance Load capacitance Table 5-5. Filter Characteristics (TA=25°C) Parameter Frequency response (10Hz – 17kHz) Passband to -0.1dB corner corner Stopband Stopband attenuation (20.49kHz – 112.5kHz) Group delay Gain drift ATSAM2195 10 Symbol Min Typ THD + THD + ...
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... Data out valid from RD Data out hold from RD 6308A–DRMSD–10-May-07 t AVCS t t CSLRDL PRD t RDLDV t WRCYC t AVCS t t CSLWRL PWR t DWS Symbol t AVCS t CSLRDL t RDHCSH t PRD t RDLDV t DRH ATSAM2195 t RDHCSH t DRH t WRHCSH t DWH Min Typ Max Unit ...
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... When data is pending on parallel port, the host should read it within 1 ms. If not, the parallel port is deactivated. Reactivating the port can be done with the following control sequence: 0FFh (Closed port), 03FFh (Open port). 2. For safe operation, write cycle time should not be lower than 3.5 µs. ATSAM2195 12 t ...
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... During power-up, the RESET input should be held low until the crystal oscillator and PLL are stabilized, which can take about 20 ms. A typical RC/diode power-up network can be used. After RESET, the ATSAM2195 enters an initialization routine. It takes around 50 ms before a MIDI IN or MPU message can be processed. ...
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... Single Supply Application Power down mode is managed by the internal power switch. The equivalent schematic and stan- dard connection is shown on the diagram below. ATSAM2195 14 ATSAM2195 6308A–DRMSD–10-May-07 ...
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... However, this is actually a noisy signal so that its power must be traded-off with the required dynamic range. For better control, the ATSAM2195 allows programmability of the dith- ering signal power as shown below. ...
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... System Design The schematics of this section are the reference designs for applications with ATSAM2195. The conformity with these schematics ensures the best performance. 9.1 3.3V Single Supply Application ATSAM2195 ATSAM2195 16 6308A–DRMSD–10-May-07 ...
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... Single Supply Application ATSAM2195 6308A–DRMSD–10-May-07 ATSAM2195 17 ...
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... Decoupling capacitors should be implemented close to the IC. • Crystal The paths between the crystal and the ATSAM2195 should be short and shielded. The ground return from the crystal compensation capacitors should be pin 31. • Analog section A specific AGND ground plane should be provided, which connects by a single trace to the GND ground ...
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Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 International Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel: (852) 2721-9778 Fax: (852) 2722-1369 Atmel ...