m5m44260cj Mitsumi Electronics, Corp., m5m44260cj Datasheet
m5m44260cj
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m5m44260cj Summary of contents
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... Early-write mode, LCAS / UCAS and OE to control output buffer impedance 512 refresh cycles every 8.2ms (A 512 refresh cycles every 128ms (A Byte or word control for Read/Write operation (2CAS, 1W type Applicable to self refresh version (M5M44260CJ,TP-5S,-6S,-7S : option) only APPLICATION Microcomputer memory, Refresh memory for CRT PIN DESCRIPTION ...
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... FUNCTION In addition to normal read,write and read-modify-write operations the M5M44260CJ, TP provides a number of other functions, e.g., Table 1 Input conditions for each mode Operation Lower byte read Upper byte read Word read Lower byte write Upper byte write Word write RAS only refresh Hidden refresh ...
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... I are dependent on output loading. Specified values are obtained with the output open. CC1 (AV) CC4 (AV) 5: Column Address can be changed once or less while RAS=V 3 M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM Conditions With respect to V Ta=25˚C (Ta=0~70˚ ...
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... CP(max 12: and defines the time at which the output achieves the high impedance state (I OFF(max) OEZ (max OL(max) 4 M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM =5V±10%, V =0V, unless otherwise noted) SS Test conditions f=1MHz ...
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... OCH t RAS hold time after OE low ORH t t Note 21: Either or must be satisfied for a read cycle. RCH RRH 5 M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM Parameter M5M44260C-5,-5S M5M44260C-6,-6S M5M44260C-7,-7S (Note 15) (Note 16) (Note 17) (Note 18) (Note 18) (Note 19) (Note 19) ...
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... DQ will contain the data read from the selected address. If neither of the above condition (delayed write) of the DQ (at access time and until CAS or OE goes back M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM ...
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... CBR self refresh RAS low pulse width RASS t CBR self refresh RAS high precharge time RPS t CBR self refresh CAS hold time CHS 7 M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM M5M44260C-5,-5S M5M44260C-6,-6S M5M44260C-7,-7S Parameter Min 35 71 (Note 25) ...
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... ~ (INPUTS ~ (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t RAS t CSH t RCD t RAD t CAH t RAH t ASC ROW COLUMN ADDRESS ADDRESS t RCS t DZC ...
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... DQ ~ (INPUTS ~ ( (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t RAS t CSH t RCD t RAD RAH ASC CAH ROW COLUMN ADDRESS t RCS t DZC t CAC t AA ...
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... ~ (INPUTS ~ (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM RAS t CSH t RCD t CAS t CAH t ASC COLUMN ADDRESS t t WCS WCH DATA VALID ...
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... DQ ~ (INPUTS ~ ( (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t RAS t CSH t RCD t t RAH CAH t ASC COLUMN ROW ADDRESS t WCS t Hi DATA VALID Hi-Z ...
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... ~ (INPUTS ~ (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t RAS t CSH t RCD t t RAH CAH t ASC ROW COLUMN ADDRESS t RCS t DZC Hi-Z t CLZ Hi-Z t DZO MITSUBISHI LSIs ...
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... V IH ( (INPUTS ~ ( (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t RAS t CSH t RCD t t CAH RAH t ASC ROW COLUMN ADDRESS t RCS Hi-Z t DZC Hi-Z t CLZ Hi OEZ ...
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... ~ (INPUTS ~ (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t RAS t CSH t RCD t RAD t t RAH CAH t ASC ROW COLUMN ADDRESS ADDRESS t AWD t CWD t RCS ...
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... DQ ~ (INPUTS ~ ( (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t RAS t CSH t RCD t RAD t t CAH RAH t ASC ROW COLUMN ADDRESS ADDRESS t AWD t CWD t RCS t ...
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... ADDRESS ~ (INPUTS ~ (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t RAS t RAH Hi-Z MITSUBISHI LSIs RPC t CRP t ASR ROW ADDRESS ...
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... OFF ~ (OUTPUTS OEZ t ODD M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM RAS t t CSR RPC t CHR MITSUBISHI LSIs RAS RP t CRP t t CHR RPC ...
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... Note 30: Early write, delayed write, read write or read modify write cycle is applicable instead of read cycle. 18 M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM (Note 30 RAS t t RCD RSH t RAD ...
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... ~ (INPUTS Hi (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t RAS t CSH RCD CAS CP t RAD t t ASC CAH t ASC COLUMN ADDRESS1 t RCS t RCH t ...
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... V (INPUTS ~ Hi-Z OH ( (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t RAS t CSH RCD CAS CP t RAD ASC CAH ASC COLUMN ADDRESS1 ADDRESS2 t t RCS ...
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... ~ (INPUTS ~ (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t CSH t t RCD CAS t t CAH t ASC RAH ROW COLUMN ADDRESS1 t t WCS WCH ...
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... ~ ( (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t CSH t t RCD CAS CAH RAH ASC ROW COLUMN ADDRESS1 t t WCH WCS ...
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... ~ (INPUTS ~ (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t CSH t t RCD CAS t t RAH CAH t ASC ROW COLUMN ADDRESS1 t RCS t WCH t DZC t DS ...
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... IH ( (INPUTS ~ Hi-Z ( (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t RAS t CSH t t RCD CAS t ASC t CAH COLUMN ADDRESS1 t CWL t RCS t WCH Hi-Z t DZC t DS Hi-Z DATA ...
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... ~ (INPUTS ~ (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t CSH t t CAS RCD t RAD t t RAH CAH t ASC ROW COLUMN ADDRESS1 t AWD t t CWD RCS ...
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... V (INPUTS ~ ( (OUTPUTS M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t CSH t t CAS RCD t RAD t t RAH CAH t ASC ROW COLUMN ADDRESS1 t AWD t t CWD RCS ...
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... OFF ~ (OUTPUTS OEZ t ODD M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM t RASS t CSR MITSUBISHI LSIs t RPS t RPC t t CHS CRP t ASR ROW ADDRESS Hi-Z COLUMN ADDRESS t RCS ...
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... CBR refresh cycle during read/write operation period to the falling edge of RAS signal at the start of self refresh operation should be set within t (shown in table 2). NSD 28 M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM Self Refresh Cycle t t 100µs ...
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... RAS signal at SNB the end of self refresh operation to the falling edge of RAS signal in the last CBR refresh cycle during read/write operation period should be set within 8.2 ms. 29 M5M44260CJ,TP-5,-5S : Under development M5M44260CJ,TP-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 4194304-BIT (262144-WORD BY 16-BIT) DYNAMIC RAM Self Refresh t 100µs ...