74F533DCQB NSC [National Semiconductor], 74F533DCQB Datasheet - Page 2

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74F533DCQB

Manufacturer Part Number
74F533DCQB
Description
Octal Transparent Latch with TRI-STATE Outputs
Manufacturer
NSC [National Semiconductor]
Datasheet
Unit Loading Fan Out
H
L
X
Functional Description
The ’F533 contains eight D-type latches with TRI-STATE
output buffers When the Latch Enable (LE) input is HIGH
data on the D
the latches are transparent i e a latch output will change
state each time its D input changes When LE is LOW the
latches store the information that was present on the D in-
Logic Diagram
Pin Names
D
LE
OE
O
e
e
e
0
0
LE
LOW Voltage Level
H
H
Immaterial
L
X
HIGH Voltage Level
–D
–O
7
7
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
Inputs
OE
Function Table
n
H
L
L
L
Data Inputs
Latch Enable Input (Active HIGH)
Output Enable Input (Active LOW)
Complementary TRI-STATE Outputs
inputs enters the latches In this condition
D
H
L
X
X
Description
Output
O
O
H
L
Z
0
150 40 (33 3)
HIGH LOW
1 0 1 0
1 0 1 0
1 0 1 0
U L
2
puts a setup time preceding the HIGH-to-LOW transition of
LE The TRI-STATE buffers are controlled by the Output
Enable (OE) input When OE is LOW the buffers are in the
bi-state mode When OE is HIGH the buffers are in the high
impedance mode but this does not interfere with entering
new data into the latches
54F 74F
b
3 mA 24 mA (20 mA)
20 A
20 A
20 A
Output I
Input I
b
b
b
IH
OH
0 6 mA
0 6 mA
0 6 mA
I
IL
I
OL
TL F 9548– 5

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