ade3000 STMicroelectronics, ade3000 Datasheet - Page 16

• Manufacturer Part Number: ade3000
• Description: Lcd Display Engines With Integrated Dvi, Adc And Yuv Ports
• Manufacturer: STMicroelectronics

Global Control Block
16/88
GLBL_SCLK_SYNTH_CTRL
GLBL_SCLK_MD_SD
GLBL_SCLK_PE_L
GLBL_SCLK_PE_H
GLBL_TST_CTRL
GLBL_ADC_CLK_SRC_SEL
GLBL_SCLK_CTRL
GLBL_TCON_BPAD_EN
Register Name
0x000A
0x000B
0x000C
0x000D
Table 4: Global Registers (Sheet 3 of 4)
0x0009
0x0010
0x0011
Addr.
Mode
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Bits
[4:3]
[2:0]
[7:0]
[2:0]
[2:0]
[7:5]
[7:3]
[7:0]
[7:1]
[7:3]
[7:5]
[7:0]
[2]
[1]
[0]
[0]
[4]
[3]
Default
0x0
0x0
0x0
0x1
0x0
0x0
0x0
0x5
0x0
0x0
0x0
0x0
0x0
0x0
0x0
XTAL frequency multiplier NDIV
SCLK frequency synthesizer EXT_PLL
SCLK frequency synthesizer PLL_SEL
SCLK freq synth control disable (normal
SCLK frequency synthesizer SDIV, range is
ADC Sample Clock Source
Invert SCLK
SCLK source select
Reserved
0x0: f
0x1: f
0x2: f
0x3: Reserved
(normal operation = 0)
(normal operation = 1)
operation = 0)
SCLK frequency synthesizer MD, range is
[16,31]
[0,7]
SCLK frequency synthesizer PE, range is [0,
32767]
Reserved
Functional Test Mode Enable
Reserved
0x0: YUVCLK pin
0x1: LLK_PLL (normal)
0x2: SCLK freq synth
0x3: CLKIN pin
0x4: FM freq synth
0x5: Crystal Clock
0x6: 0
0x7: Reserved
Reserved
Reserved
0x0: YUVCLK pin
0x1: SCLK freq synth
0x2: FM freq synth (normal)
0x3: inclk source
0x4: CLKIN pin
0x5: crystal clock
0x6: 0
0x7: Reserved
For each bit n (0 to 7),
0: TCON[n] pin is TCON output
1: TCON[n] pin is input into TVI block
XCLK
XCLK
XCLK
= 54MHz
= 27MHz (normal)
= 13.5MHz
Description
ADE3XXX