thc63lvd104 THine Electronics,Inc., thc63lvd104 Datasheet

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thc63lvd104

Manufacturer Part Number
thc63lvd104
Description
90mhz 30bits Color Lvds Receiver
Manufacturer
THine Electronics,Inc.
Datasheet

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THC63LVD104A Rev.1.0
General Description
The THC63LVD104A receiver is designed to support
pixel data transmission between Host and Flat Panel
Display from NTSC up to WXGA resolutions. The
THC63LVD104A converts the LVDS data streams back
into 35bits of CMOS/TTL data with rising edge or fall-
ing edge clock for convenient with a variety of LCD
panel controllers.At a transmit clock frequency of
90MHz, 30bits of RGB data and 5bits of timing and
control data (HSYNC,VSYNC,DE,CNTL1,CNTL2)
are transmitted at an effective rate of 630Mbps per
LVDS channel.Using a 90MHz clock, the data through-
put is 394Mbytes per second.
Block Diagram
Copyright 2003 THine Electronics, Inc. All rights reserved
LVDS INPUT
CMOS/TTL INPUT
RCLK+/-
(8 to90MHz)
TEST
RA+/-
RC+/-
RD+/-
RB+/-
RE+/-
R/F
OE
PD
90MHz 30Bits COLOR LVDS Receiver
THC63LVD104A
PLL
1
Features
Wide dot clock range: 8-90MHz suited for NTSC,
VGA, SVGA, XGA, and WXGA
PLL requires no external components
50% output clock duty cycle
TTL clock edge programmable
Power down mode
Low power single 3.3V CMOS design
64pin TQFP
Backward compatible with THC63LVDF64x
(18bits) / F84x(24bits)
7
7
7
7
7
CMOS/TTL OUTPUT
RA6-RA0
RB6-RB0
RC6-RC0
RD6-RD0
RE6-RE0
CLKOUT
THine Electronics, Inc.
THine

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thc63lvd104 Summary of contents

Page 1

... The THC63LVD104A receiver is designed to support pixel data transmission between Host and Flat Panel Display from NTSC up to WXGA resolutions. The THC63LVD104A converts the LVDS data streams back into 35bits of CMOS/TTL data with rising edge or fall- ing edge clock for convenient with a variety of LCD panel controllers ...

Page 2

... THC63LVD104A Rev.1.0 Pin Out 49 RA- 50 RA+ 51 RB- 52 RB+ 53 LVCC 54 RC- 55 RC+ 56 RCLK- 57 RCLK+ 58 LGND 59 RD- 60 RD+ 61 RE- 62 RE+ 63 PGND 64 PVCC Copyright 2003 THine Electronics, Inc. All rights reserved THine RB6 CLKOUT GND RC0 ...

Page 3

... THC63LVD104A Rev.1.0 Pin Description Pin Name Pin # RA+, RA- 50, 49 RB+, RB- 52, 51 RC+, RC- 55, 54 RD+, RD- 60, 59 RE+,RE- 62, 61 RCLK+, RCLK- 57, 56 RA6 ~ RA0 40,41,42,43,45,46,47 RB6 ~ RB0 32,33,34,35,36,38,39 RC6 ~ RC0 22,24,25,26,27,28,29 RD6 ~ RD0 14,15,17,18,19,20,21 RE6 ~ RE0 6,7,8,10,11,12,13 TEST R/F 5 VCC 9,23,37,48 CLKOUT 31 GND 1,16,30,44 LVCC 53 LGND 58 PVCC 64 PGND 63 PD ...

Page 4

... THC63LVD104A Rev.1.0 Absolute Maximum Ratings Supply Voltage ( CMOS/TTL Input Voltage CMOS/TTL Output Voltage LVDS Receiver Input Voltage Output Current Junction Temperature Storage Temperature Range Resistance to soldering heat Maximum Power Dissipation @+25 Electrical Characteristics CMOS/TTL DC Specifications Symbol Parameter V High Level Input Voltage ...

Page 5

... THC63LVD104A Rev.1.0 Supply Current Symbol Parameter Receiver Supply I Current RCCG (Gray Scale Pattern) Receiver Supply I Current RCCW (Checker Pattern) Receiver Power Down I RCCS Supply Current Copyright 2003 THine Electronics, Inc. All rights reserved V CC Conditions CL=8pF 90MHz CLKOUT Vcc=3.3V CL=8pF 90MHz CLKOUT Vcc=3 ...

Page 6

... THC63LVD104A Rev.1.0 Incremental Pattern(Gray Scale) CLKOUT Rx0 Rx1 Rx2 Rx3 Rx4 Rx5 Rx6 x=A,B,C,D,E Toggle Pattern(Checker) CLKOUT Rx0 Rx1 Rx2 Rx3 Rx4 Rx5 Rx6 x=A,B,C,D,E Copyright 2003 THine Electronics, Inc. All rights reserved 6 THine THine Electronics, Inc. ...

Page 7

... THC63LVD104A Rev.1.0 Switching Characteristics Symbol Parameter t CLKOUT Period RCP t CLKOUT High Time RCH t CLKOUT Low Time RCL t TTL Data Setup to CLKOUT RS t TTL Data Hold from CLKOUT RH t TTL Low to High Transition Time TLH t TTL High to Low Transition Time THL t Input Data Position0 ...

Page 8

... THC63LVD104A Rev.1.0 AC Timing Diagrams TTL Outputs 2.0V CLKOUT Rxn x = A,B,C,D 0,1,2,3,4,5,6 Phase Lock Loop Set Time VCC RCLK+/- PD CLKOUT Copyright 2003 THine Electronics, Inc. All rights reserved t RCH 2.0V 2.0V t RCP t RS 2.0V 0.8V 3.0V 2.0V 8 THine t RCL R 0.8V 0.8V R 2.0V 0.8V t RPLL 2.0V THine Electronics, Inc. ...

Page 9

... THC63LVD104A Rev.1.0 Power Up Sequence Power Up Sequence must be Sequence1 or Sequence2. 1)Sequence1 VCC PVCC LVCC PD Recommended PD Pin Circuit 2)Sequence2 VCC PVCC LVCC GND PD GND PD pin must be High after VCC voltage is 3.0V. Copyright 2003 THine Electronics, Inc. All rights reserved VCC/2 Min 100usec VCC/2 VCC ...

Page 10

... THC63LVD104A Rev.1.0 AC Timing Diagrams LVDS Inputs Rx+/- Rx6 Rx5 Rx4 RCLK A,B,C,D,E Copyright 2003 THine Electronics, Inc. All rights reserved t RIP2 t RIP3 t RIP4 t RIP5 t RIP6 t RIP0 t RIP1 Rx3 Rx2 Rx1 Rx0 Rx6 diff t RCIP 10 THine Rx5 Rx4 Rx3 Rx2 Rx1 diff ...

Page 11

... THC63LVD104A Rev.1.0 AC Timing Diagrams LVDS Inputs diff RCLK+ (Differential) RA+/- RA3’ RA2’ RA1’ RA0’ RB+/- RB3’ RB2’ RB1’ RB0’ RC+/- RC3’ RC2’ RC1’ RC0’ RD+/- RD3’ RD2’ RD1’ RD0’ ...

Page 12

... THC63LVD104A Rev.1.0 Package INDEX ∆ PIN No.1 16 Copyright 2003 THine Electronics, Inc. All rights reserved THine 48 33 UNITS: mm THine Electronics, Inc. ...

Page 13

... CAUSED ONLY BY THC63LVD104A WITHOUT ANY ITEM NOT SOLD BY THINE AND/OR ANY USERS’ ACTION. THINE IS NOT RESPONSIBLE FOR PROBLEMS CAUSED BY SPECIFICATIONS SUPPLIED BY USERS. THC63LVD104A is designed on the premise that it should be used for ordinary electronic devices. There- fore, it shall not be used for applications that require extremely high-reliability (space equipment, nuclear control equipment, medical equipment that affects people’ ...

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