74LVX00MTC Fairchild Semiconductor, 74LVX00MTC Datasheet

IC GATE NAND QUAD 2IN LV 14TSSOP

74LVX00MTC

Manufacturer Part Number
74LVX00MTC
Description
IC GATE NAND QUAD 2IN LV 14TSSOP
Manufacturer
Fairchild Semiconductor
Series
74LVXr
Datasheet

Specifications of 74LVX00MTC

Logic Type
NAND Gate
Number Of Inputs
2
Number Of Circuits
4
Current - Output High, Low
4mA, 4mA
Voltage - Supply
2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
14-TSSOP
Product
NAND
Logic Family
74LVX
High Level Output Current
- 4 mA
Low Level Output Current
4 mA
Propagation Delay Time
13.6 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVX00MTC
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
Part Number:
74LVX00MTCX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
©1993 Fairchild Semiconductor Corporation
74LVX00 Rev. 1.4.0
74LVX00
Low Voltage Quad 2-Input NAND Gate
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Connection Diagram
Pin Description
74LVX00M
74LVX00SJ
74LVX00MTC
A
O
n
Input voltage level translation from 5V to 3V
Ideal for low power/low noise 3.3V applications
Guaranteed simultaneous switching noise level and
dynamic threshold performance
n
Pin Names
, B
Number
All packages are lead free per JEDEC: J-STD-020B standard.
Order
n
Package
Number
Inputs
Outputs
MTC14
M14D
M14A
Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
General Description
The LVX00 contains four 2-input NAND gates. The
inputs tolerate voltages up to 7V allowing the interface of
5V systems to 3V systems.
Logic Symbol
Package Description
IEEE/IEC
February 2008
www.fairchildsemi.com

Related parts for 74LVX00MTC

74LVX00MTC Summary of contents

Page 1

... Order Package Number Number 74LVX00M M14A 74LVX00SJ M14D 74LVX00MTC MTC14 Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. Connection Diagram Pin Description Pin Names Description ...

Page 2

... Input Voltage I V Output Voltage O T Operating Temperature Input Rise and Fall Time Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1993 Fairchild Semiconductor Corporation 74LVX00 Rev. 1.4.0 Parameter –0.5V I (1) Parameter 2 Rating –0.5V to +7.0V –20mA –0. –20mA +20mA – ...

Page 3

... Quiet Output Minimum Dynamic V OLV V Minimum HIGH Level Dynamic Input Voltage IHD V Maximum LOW Level Dynamic Input Voltage ILD Note: 2. Input t t 3ns r f ©1993 Fairchild Semiconductor Corporation 74LVX00 Rev. 1.4.0 V Conditions Min. Typ. Max. CC 2.0 3.0 3.6 2.0 3.0 3.6 2.0 V ...

Page 4

... Parameter C Input Capacitance IN C Power Dissipation Capacitance PD Note defined as the value of the internal equivalent capacitance which is calculated from the operating current PD consumption without load. Average operating current can be obtained by the eqation: I ©1993 Fairchild Semiconductor Corporation 74LVX00 Rev. 1.4 (V) C (pF) Min 2 3.3 ± 0.3 ...

Page 5

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 6

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 7

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 8

... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...

Related keywords