SC92031L SILAN [Silan Microelectronics Joint-stock], SC92031L Datasheet
SC92031L
Related parts for SC92031L
SC92031L Summary of contents
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... Provides PCI bus master data transfers and PCI memory space or I/O space mapped data transfers of HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn SC92031 QFP-100-14x20-0.65 LQFP-100-14x14-0.5 ORDERING INFORMATION Device Package SC92031 QFP-100-14 X 20-0.65 SC92031L LQFP-100-14 X 14-0.5 APPLICATIONS * 10/100Mbps PCI fast Ethernet adaptor REV:1.0 2004.08.03 Page ...
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SC92031's operational registers Ø Supports PCI VPD (Vital Product Data) Ø Supports ACPI 1.0 and PCI power management Ver.1.1 compliant Ø Supports PCI multi-function to incorporate with other PCI master device * Supports 25MHz crystal or 25MHz OSC as the ...
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ABSOLUTE MAXIMUM RATINGS Characteristics Supply Voltage Input/Output Voltage Operating Temperature Storage Temperature DC ELECTRICAL CHARACTERISTICS Characteristics Supply voltage V =3.0V min. to 3.6V max. DD Minimum High Level Output Voltage Maximum Low Level Output Voltage Minimum High Level Input Voltage ...
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... AD31-0 37, 40, 41, 43, 44 HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com. SC92031L Description When RSTB is asserted low, the SC92031 performs internal system hardware reset. RSTB must be held for a minimum of 120 ns. This PCI Bus clock provides timing for all transactions and bus phases, and is input to PCI devices ...
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Pin No. Symbol 98, 10, 20, 31 C/BE3-0B 14 DEVSELB 11 FRAMEB 85 GNTB 86 REQB 99 IDSEL 81 INTAB 12 IRDYB 13 TRDYB 19 PAR 16 PERRB 18 SERRB 15 STOPB Power Management/Isolation Interface 87 PMEB 71 LWAKE ...
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Pin No. Symbol Power Pins 6,21,33,42, VDD 84,97 67 VDD_IR VDDAH_RX 52,60,66 VDDAH_CM AVDD 2,17, GND 30,38,39, 51 VSA_RX 55, 58, 63 VSA_CM AGND LED Interface ACT, LINK, SPEED,DUPL 76,75,74, TX+ 65 TX- 54 RX+ 53 RX- ...
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Pin No. Symbol 50 CLKR ANTEST_A 57 ANTEST_B 68 PORXRS 77 G_RST REGISTER DESCRIPTION The chip provides the following set of operational registers mapped into PCI memory space or I/O space. Offset R/W 0x00 R/W CONFIG0 ...
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Offset R/W 0x5C R/W TX_CONFIGURATION 0x60 - - 0x64 R/W FLOW_CONTROL 0x68 R/W MIIM_COMMAND0 0x6C R/W MIIM_COMMAND1 0x70 R MIIM_STATUS 0x74 R/W TimerCnt 0x78 R/W TimerInt 0x7C R/W PM_CONFIG 0x80 R/W CRC 0x84 R/W CRC 0x88 R/W WAKEUP0 0x8C ...
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Config 0: Configuration Register 0 (Offset 0000h, R/W) Bit R/W Symbol 31 R/W Software Reset Analog Power 30 R/W Down 29 R/W Power Saving 28 Config 1: Configuration Register 1 (Offset 0004h, R/W) Bit R/W Symbol ...
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Interrupt Status Register (Offset 000Ch, R) The interrupt Status Register reflects all current pending interrupts, regardless of the state of the corresponding mask bit in the IMR. Reading the ISR clears all interrupts. Writing to the ISR has no ...
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Bit R/W Symbol 6 R TABT2 5 R TABT1 4 R TABT0 3 R OWN3 2 R OWN2 1 R OWN1 0 R OWN0 7 Tansmit Status Register (TX_STATUS0-3)(Offset 0020h-002Fh, R/W) The read-only bits will be cleared by the ...
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Receive Configuration Register (Offset 0040h, R/W) Bit R/W Symbol 31 R/W Rx_FullDX 30 R/W En_Rx 29 R/W Rcv Small 28 R/W Rcv_Huge 27 R/W Rcv_Error_Frame 26 R/W Rcv_All 25 R/W Rcv_Multi 24 R/W Rcv_Broad 23-22 R/W Lp_Bck 21-12 R/W ...
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Flow Control Configuration Register (Offset 0064h, R/W) Bit R/W Symbol 31 R/W Fulldx 30 R/W En_FC 29 R/W PASSALL 28 R/W En_Pause 27 R/W Tx_Pause_F 26 R/W Tx_Pause_0 25 MIIM Command Register 0 (Offset 0068h, R/W) ...
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Power Management Configuration Register (Offset 007Ch, R/W) Bit R/W Symbol 31 R/W PMEn 30 R/W En_LongWF 29 R/W En_Magic 28 R/W LANWake 27-26 R/W LOST 25 R/W LinkUp 24 R/W WakeUp 23 HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: ...
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INTERNAL PHY REGISTER DESCRIPTION Basic Mode Control Register (Offset 00, R/W) Bit R/W Name 15 R/W Reset R/W Spd_Set Auto negotiation 12 R/W Enable (ANE) 11- Restart Auto 9 R/W Negotiation 8 R/W Duplex ...
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Bit R/W Name 3 R Auto Negotiation 2 R Link Status 1 R Jabber Detect Extended 0 R Capability Auto-negotiation Advertisement Register (Offset 04, R/W) This register contains the advertised abilities of this device as they will be transmitted ...
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Auto-Negotiation Link Partner Ability Register (Offset 05, R) This register contains the advertised abilities of the Link Partner as received during Auto-negotiation. The content changes after the successful Auto-negotiation if Next-pages are supported. Bit R/W Name ...
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False Carrier Sense Counter (Offset 11, R) This counter provides information required to implement the “ FalseCarriers” attribute within the MAU managed object class of Clause 30 of IEEE 802.3u specification. Bit R/W Name FCSCNT Nway Test ...
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FUNCTION DESCRIPTION Ø Transmit operation The host CPU initiates a transmission by storing an entire packet of data in one of the descriptors in the main memory. When the entire packet has been transferred to the Tx buffer, the SC92031 ...
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Loopback Operation Ø Loopback mode is normally used to verify that the logic operations up to the Ethernet cable function correctly. In loopback mode for 100Mbps, the SC92031 takes frames from the transmit descriptor and transmits them up to internal ...
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Words Contents 00h 1904 01h 2031 02h Device ID 03h Vendor ID MAXLAT 04h MINGNT INTR PIN 05h INTR LINE 06h Sub ID 07h Sub Vendor ID 08h-0Ah - Ethernet 0Bh-0Dh Address 0Eh-1Fh - 20h-3Fh VPD DATA PCI Configuration Space ...
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No. Name Type 0Fh BIST R R 10h W 11h IOAR R/W IOAR15 IOAR14 IOAR13 IOAR12 IOAR11 IOAR10 12h R/W IOAR23 13h R/W IOAR31 R 14h MEMAR W 15h R/W MEM15 16h R/W MEM23 MEMAR 17h R/W MEM31 18h- ...
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No. Name Type R 54h PMCSR W PME_ R status 55h PMCSR PME_ W status 56h- Reserved 5Fh 60h VPDID R 61h NextPtr R VPDADD 62h R/W Flag VPD Address 63h R/W Flag 64h R/W Data7 65h R/W Data15 ...
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Bit Symbol 15-10 - Reserved Fast Back-To-Back Enable: When <FBTBEN>=0, read as a zero. write operation has no effect. The SC92031 will not generate Fast Back-to-back cycles. When <FBTBEN>=1, This read/write bit controls whether or not a master can do ...
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Bit Symbol Detected Parity Error: When set indicates that the SC92031 detected a parity error, 15 DPERR even if parity error handling is disabled in command register PERRSP bit. Signaled System Error: When set indicates that the SC92031 asserted the ...
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CLS: Cache Line Size Read will return a zero, write are ignored. LTR: Latency Timer Register Specifies, in units of PCI bus clocks, the value of the latency timer of the SC92031. When the SC92031 asserts FRAMEB, it enables its ...
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Bit Symbol 31-18 BMAR31-18 Boot ROM Base Address These bits indicate how many Boot ROM spaces to be supported. The Relationship between <BS2:0> and BMAR17-11 is the following: BS2 BS1 BS0 Description 17-11 ROMSIZE ...
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No. Name Type 06h R Status R 07h W DPERR 08H Revision ID R 09h PIFR R 0Ah SCR R 0Bh BCR R 0Ch CLS R R 0Dh LTR W LTR7 0Eh HTR R 0Fh BIST R 10h R ...
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No. Name Type 34h Cap_Ptr R 35h- Reserved (All 0) 3Bh 3Ch ILR R/W 3Dh IPR R 3Eh MNGNT R 3Fh MXLAT R 40h- Reserved (All 0) FFh PCI Power Management functions The SC92031 supports power management mechanism, it ...
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LED INTERFACE 1 LED_ACTIVE The LED_ACTIVE pin indicates the presence of transmit or receive activity. 2 LED_SPEED The LED_SPEED pin indicates a good link at 100 Mb/s data rate. HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn SC92031 REV:1.0 2004.08.03 Page 30 ...
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LED_DUPLEX_COL The LED_DUPLEX_COL pin indicates a FULL DUPLEX link or collisions in a HALF DUPLEX link. PCI BUS OPERATION TIMING Target Read HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn Power On LED=Low No Full Duplex Yes LED=High Collisiion status Yes ...
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Target Write Configuration Read HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn SC92031 REV:1.0 2004.08.03 Page ...
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Configuration Write Bus Arbitration Memory Read HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn SC92031 REV:1.0 2004.08.03 Page ...
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Memory Write Target Initiated Termination - Retry 1 2 CLK FRAMEB AD31~0 ADRESS IRDYB TRDYB STOPB DEVSELB Target Initiated Termination - Disconnect HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com. DATA1 DATA2 SC92031 6 7 REV:1.0 2004.08.03 Page 34 ...
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Target Initiated Termination - Abort Master Initiated Termination - Abort 1 2 CLK FRAMEB IRDYB DEVSELB FAST Parity Operation - one example HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com. MED SLOW SUB SC92031 REV:1.0 2004.08.03 ...
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TYPICAL APPLICATION CIRCUIT HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn SC92031 REV:1.0 2004.08.03 Page ...
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PACKAGE OUTLINE QFP-100-14×20-0.65 LQFP-100-14×14-0.50 HANGZHOU SILAN MICROELECTRONICS CO.,LTD Http: www.silan.com.cn SC92031 UNIT: mm UNIT: mm REV:1.0 2004.08.03 Page ...
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HANDLING MOS DEVICES: Electrostatic charges can exist in many things. All of our MOS devices are internally protected against electrostatic discharge but they can be damaged if the following precautions are not taken: Persons at a work bench should be ...