rpc2a-000-dil Radiometrix Ltd, rpc2a-000-dil Datasheet

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rpc2a-000-dil

Manufacturer Part Number
rpc2a-000-dil
Description
Uhf Radio Packet Controller
Manufacturer
Radiometrix Ltd
Datasheet
figure 1: RPC2A + Host -controller
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I
The RPC2A is an enhanced replacement for original RPC-433-40 transceiver. It is a self-contained plug-
on radio port which requires only a simple antenna, 5V supply and a byte-wide I/O port on a host
microcontroller (or bi-directional PC port).
The module provides all the RF circuits and processor intensive low level packet formatting and packet
recovery functions required to inter-connect an number of microcontrollers in a radio network.
A data packet of 1 to 27 bytes downloaded by a Host microcontroller into the RPC2A's packet buffer is
transmitted by the RPC2A’s transceiver and will "appear" in the receive buffer of all the RPC2A's within
radio range.
A data packet received by the RPC2A’s transceiver is decoded, stored in a packet buffer and the Host
microcontroller signalled that a valid packet is waiting to be uploaded.
Radiometrix Ltd, RPC2A
Modules: RPC2A-433-64: IC+BiM2A-433-64-S
IC’s:
The RPC2A-433-64 is intelligent transceiver
modules, which enable a radio network/link to
be simply implemented between a number of
digital devices. The module combines a UHF
radio
controller.
NTRODUCTION
20 April 2007
Crystal controlled PLL FM circuitry for both Tx and Rx
Reliable 75 meter in-building range, 300m open ground
Built-in self-test / diagnostics / status LED’s
Complies with ETSI EN 300 220-3
Complies with ETSI EN 301 489-3
Single 5V supply @ < 27mA
64kbps half duplex
Free format packets of 1 - 27 bytes
Packet framing and error checking are user transparent
Collision avoidance (listen before transmit)
Direct interface to 5V CMOS logic
Power save mode
HOST
transceiver
RPC-000-SS:
RPC-000-DIL:
RPC-000-SO:
download
upload
UHF Radio Packet Controller
Hartcran House, 231 Kenton Lane, Harrow, HA3 8RP, England
and
Radiometrix
a
18 pin DIL IC
18 pin SO IC
20 pin SSOP IC
Tel: +44 (0) 20 8909 9595, Fax: +44 (0) 20 8909 2233
transmit / receive
64kbps
packet
RPC2A
download
upload
HOST
The RPC2A-module
RPC2A
page 1

Related parts for rpc2a-000-dil

rpc2a-000-dil Summary of contents

Page 1

... The module provides all the RF circuits and processor intensive low level packet formatting and packet recovery functions required to inter-connect an number of microcontrollers in a radio network. A data packet bytes downloaded by a Host microcontroller into the RPC2A's packet buffer is transmitted by the RPC2A’s transceiver and will "appear" in the receive buffer of all the RPC2A's within radio range. A data packet received by the RPC2A’ ...

Page 2

... Radiometrix Ltd, RPC2A page 2 ...

Page 3

... T OST RANSFERS If the host sets the TX Request line low a data transfer from the Host to the RPC2A will be initiated. Similarly the RPC2A will pull RX Request low when it requires to transfer data to the Host (this may polled or used to generate a Host interrupt). The transfer protocol is fully asynchronous, i.e. the host may service another interrupt and then continue with the RPC2A transfer desirable that all transfers are completed quickly since the radio transceiver is disabled until the Host < ...

Page 4

... RANSMIT On receipt of a data packet from the host, the RPC2A will append to the packet - preamble, frame sync byte and an error check sum. The packet is then coded for mark:space balance and transmitted. A full 27 byte packet is transmitted in 8.1ms of TX air time (64kb/s + 5ms preamble) ...

Page 5

... HE OST NTERFACE 2.1 S IGNALS It is recommended that the RPC2A be assigned to a byte wide bi-directional I/O port on the host processor. The port must be such that the 4 data lines can be direction controlled without affecting the 4 handshake line. pin pin pin name number function TXR 6 TX Request ...

Page 6

... R & A EQUEST TX Request & TX Accept: RX Request & RX Accept: A packet transferred between host and RPC2A consists of between 1 and 28 bytes, the first byte of the packet is always the control byte. There are two classes of H OST 1. Data Packets: To the transmitter or from the receiver 2 ...

Page 7

... TX download timing diagram Notes: The data bus must not be set to output until step 3. i.e. after the RPC2A has accepted the request. The bus may be left as an output until the entire packet has been transferred to the RPC2A, it should then be set back to input (default state). ...

Page 8

... Host reads the data and negates RX Accept (i.e. data has been accepted) Repeat steps 1-4 with MS nibble. figure 8: RX upload timing diagram Notes: The RPC2A will turn off it's data bus drivers after the entire packet has been uploaded to the HOST. See Appendix B and C. for example RPC2A driver subroutines. 2.2 H <> RPC2A P ...

Page 9

... ENDING AND RECEIVING Data packets are sent to / received from remote RPC2A’s. They begin with a control byte with bit 7 cleared and may be of variable length and contain bytes of user determined data. figure 9: Control byte for data packet The remainder of the bytes in the data packet are of the users determination. ...

Page 10

... Host issues just the control byte, with bit 6 (W/R) cleared, bit 7 (PT) set and the memory address. The RPC2A will respond with 2 bytes, the first is a control byte which is an echo of the control byte just issued by the host, this is useful if the host is using an interrupt handler. The 2nd byte is the memory contents ...

Page 11

... Transceiver and the RPC2A for a period of time (O RPC2A is in the Idle state (i.e. nothing happening). During the O device leakage of <50 A typ. The RPC2A will still respond immediately to a Host TX Request but cannot receive radio signals. After the programmed O receiver on and listen for valid preamble. ON time = PWR-> ...

Page 12

... Time-Out and reset if Host fails to reply to any request or handshake within 2.9s 3 EEPROM W E RITE NABLE This bit protects the EEPROM from accidental writes, it must be set to 1 prior to each byte write to the EEPROM (addresses 01h to 3Fh). This bit will be cleared by the RPC2A after each byte write. 3 ELF EST LAG Writing this switch will initiate a radio self test ...

Page 13

... RPC2As could be attempting to transmit at the same time. The receiver is turned on and the channel is checked for preamble or data. If the channel is clear the RPC2A will go to transmit, if the channel is busy the RPC2A will delay by a random time (setable by TX-BACK-OFF in EEPROM) then try again for a clear channel ...

Page 14

... SER ONFIGURABLE ARAMETERS The EEPROM has address range 01h - 3Fh (63 Bytes) The first 15 BYTES (8 are defined) contain parameters used to control the RPC2A. figure 13: RPC2A’s EEPROM memory Radiometrix Ltd, RPC2A N page 14 ...

Page 15

... FF formula Wake-up message = W valid range Power Save 'Off' Time (RC controlled) LEEP IME The OFF time is controlled oscillator in the RPC2A which has a wide tolerance of +/- 30% address 03 default 05 formula Off-time = valid range change over delay in units of 100 s ...

Page 16

... For normal operation of the RPC2A the TXR line must be held high for either 1ms reset pulse or 100ms after a power up. There are 9 test modes which are selected by a binary code applied to the RPC2A's data bus bit DIL switch or rotary HEX switch connected between the data bus and 0V will select the modes (the RPC2A has weak internal pull-up's) ...

Page 17

... Radiometrix Ltd, RPC2A D O (RXR RED LED = preamble detected) ETECTOR N D REAMBLE ETECTOR testing on spec. Analyser QUARE AVE OD YE DIAGRAM REAMBLE BURSTS , re-transmit any valid packets received P "RADIOMETRIX" and listen for echo ...

Page 18

... Hold The Line' code. An 8th balancing bit is added after the Barker sequence. Data Each byte in the RPC2A's buffer is expanded into a 12 bit symbol prior to sending. The symbol coding has the following properties :- Perfect 50:50 balance, i.e.. always 6 one's & 6 zero's There are never more than 4 consecutive one's or zero's ...

Page 19

... All of the redundancy in the code is directed towards error checking. For an FM radio link using short packet lengths, e.g. RPC2A + BiM , packets are either 100 grossly corrupt unrecoverable. By the same reasoning, the Host is not informed when the RPC2A decoder aborts a packet decode since corrupt information is of little value ...

Page 20

... RPC2A TXA TXR RXA RXR figure 16: RPC2A to PIC - C interface Packet transfers to / from the RPC2A are best handled in the host by two subroutines :- OUT_BYTE & IN_BYTE Additionally LISTEN_BUS is called on completion of a packet transfer to the RPC2A to return the data bus to inputs (default state). ;--------------------------------------------------------------------; ; ...

Page 21

... BSF RPC2A,RXA ANDLW B'11110000' ;JUST THE DATA ; IORWF INDF ; ; ; A BYTE HAS BEEN READ FROM THE RPC2A INTO ADDRESS POINTED AT BY FSR ; ;-------------------------------------------------------------------- ; Radiometrix Ltd, RPC2A :RXR LINE FROM THE RPC2A ;WE GOT A RX REQUEST YET? ; LOOP BACK AND WAIT READ THE LS NIBBLE FROM THE RPC2A ...

Page 22

... OUT_BYTE ;OUT_BYTE WRITE A BYTE FROM FILE POINTED TO BY FSR TO RPC2A ; W IS DESTROYED ; ; NOTE THIS ROUTINE WILL HANG THE HOST UNTIL THE RPC2A ; ACCEPTS THE TRANSFER OF TWO NIBBLES ; ; WARNING DETECTING A TXA FROM THE RPC2A (i.e. call LISTENBUS) ; OUT_BYTE SWAPF INDF,W ; ANDLW B'11110000' ;JUST THE NIBBLE IORLW B'00000010' ...

Page 23

... RPC2A TXA TXR RXA RXR figure 17: RPC2A to HC11 -C interface Packet transfers to / from the RPC2A are best handled in the host by two subroutines :- OUT_BYTE & IN_BYTE Additionally LISTEN_BUS is called on completion of a packet transfer to the RPC2A to return the data bus to inputs (default state). ********************************************************************* * ...

Page 24

... SAVE_X RMB 2 ********************************************************************** * SUBROUTINE: IN_BYTE ********************************************************************* *This subroutine is designed to be called by an interrupt handler to *read a byte from the RPC2A into a file pointed *Note: The interrupt handler should load the X register with the file address before calling this subroutine. IN_BYTE CLR SAVE_1 LDAB ...

Page 25

... SUBROUTINE: OUT_BYTE ********************************************************************** *This subroutine will output of one byte to the RPC2A. Register X *should contain the address of the memory location of the byte to be *send. *Note: that register X has to be pre-loaded before entering this * subroutine. OUT_BYTE LDAA 0,X ANDA #%00001111 LDAB PORTC ANDB #%11101111 ...

Page 26

... BIT TIME = Hz f xtal Accuracy, temp drifts MUST KEEP X-TAL +/- 100ppm of nominal figure 18: RPC2A-000-SO & RPC2A-000-DIL outlines Radiometrix Ltd, RPC2A ( i.e. 64kbit/s for Fclk=16.38MHz) i.e. 16.38MHz crystal = 31.2 s PER BIT page 26 ...

Page 27

... The information furnished by Radiometrix Ltd is believed to be accurate and reliable. Radiometrix Ltd reserves the right to make changes or improvements in the design, specification or manufacture of its subassembly products without notice. Radiometrix Ltd does not assume any liability arising from the application or use of any product or circuit described herein, nor for any infringements of patents or other rights of third parties which may result from the use of its products ...

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