UPD43256B-X_06 NEC [NEC], UPD43256B-X_06 Datasheet

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UPD43256B-X_06

Manufacturer Part Number
UPD43256B-X_06
Description
256K-BIT CMOS STATIC RAM 32K-WORD BY 8-BIT EXTENDED TEMPERATURE OPERATION
Manufacturer
NEC [NEC]
Datasheet
Document No. M11012EJ6V0DS00 (6th edition)
Date Published June 2006 NS CP (K)
Printed in Japan
Description
And A and B versions are low voltage operations. Battery backup is available.
Features
• 32,768 words by 8 bits organization
• Fast access time: 70, 85, 100, 120, 150 ns (MAX.)
• Operating ambient temperature: T
• Low voltage operation (A version: V
• Low V
• /OE input for easy application
Notes 1. T
μ
μ
μ
The
The
The
PD43256B-xxX
PD43256B-AxxX
PD43256B-BxxX
Part number
μ
μ
μ
PD43256B-X is a high speed, low power, and 262,144 bits (32,768 words by 8 bits) CMOS static RAM.
PD43256B-X is an extended-operating-temperature version of the
PD43256B-X is packed in 28-pin PLASTIC TSOP (I) (8 x 13.4 mm).
2. 100 ns (MAX.) (V
CC
data retention: 2.0 V (MIN.)
A
≤ 40 °C, V
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Note2
100, 120
85
CC
Note2
Access time
= 3.0 V
ns (MAX.)
CC
, 100, 120
70, 85
EXTENDED TEMPERATURE OPERATION
Note2
= 4.5 to 5.5 V)
, 150
A
256K-BIT CMOS STATIC RAM
Note2
= –25 to +85 °C
CC
Note2
= 3.0 to 5.5 V, B version: V
Operating supply Operating ambient
32K-WORD BY 8-BIT
4.5 to 5.5
3.0 to 5.5
2.7 to 5.5
voltage
DATA SHEET
V
temperature
−25 to +85
°C
CC
MOS INTEGRATED CIRCUIT
= 2.7 to 5.5 V)
μ
PD43256B (X version : T
μ
At operating
mA (MAX.)
PD43256B-X
45
40
Supply current
At standby
μ
A (MAX.)
50
A
= –25 to +85°C).
At data retention
μ
A (MAX.)
2
Note1
1995

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UPD43256B-X_06 Summary of contents

Page 1

EXTENDED TEMPERATURE OPERATION Description μ The PD43256B high speed, low power, and 262,144 bits (32,768 words by 8 bits) CMOS static RAM. μ The PD43256B extended-operating-temperature version of the And A and B versions are low ...

Page 2

Ordering Information Part number Package μ PD43256BGW-70X-9JL 28-pin PLASTIC TSOP(I) μ PD43256BGW-85X-9JL (8x13.4) (Normal bent) μ PD43256BGW-A85X-9JL μ PD43256BGW-A10X-9JL μ PD43256BGW-A12X-9JL μ PD43256BGW-B10X-9JL μ PD43256BGW-B12X-9JL μ PD43256BGW-B15X-9JL μ PD43256BGW-70X-9KL 28-pin PLASTIC TSOP(I) μ PD43256BGW-85X-9KL (8x13.4) (Reverse bent) μ PD43256BGW-A85X-9KL μ ...

Page 3

Pin Configurations (Marking Side) /xxx indicates active low signal. 28-pin PLASTIC TSOP(I) (8x13.4) (Normal bent) /OE 1 A11 A13 5 / A14 8 A12 ...

Page 4

Block Diagram A0 Address buffer A14 I/O1 I/O8 /CS /OE / GND Truth Table /CS /OE /WE × × × Remark × ...

Page 5

Electrical Specifications Absolute Maximum Ratings Parameter Symbol Supply voltage Input / Output voltage Operating ambient temperature Storage temperature Note –3.0 V (MIN.) (Pulse width : 50 ns) Caution Exposing the device to stress above those listed in Absolute Maximum Rating ...

Page 6

DC Characteristics (Recommended Operating Conditions Unless Otherwise Noted) (1/2) Parameter Symbol Input leakage current I/O leakage current I/O / Operating supply current I / CCA1 I / ...

Page 7

DC Characteristics (Recommended Operating Conditions Unless Otherwise Noted) (2/2) Parameter Symbol Input leakage current I/O leakage current I/O / Operating supply ...

Page 8

AC Characteristics (Recommended Operating Conditions Unless Otherwise Noted) AC Test Conditions μ μ [ PD43256B-70X, PD43256B-85X] Input Waveform (Rise and Fall Time ≤ 5 ns) 2.4 V 1.5 V 0.6 V Output Waveform 1.5 V Output Load AC characteristics should ...

Page 9

Read Cycle (1/2) Parameter Symbol Read cycle time t RC Address access time t AA /CS access time t ACS /OE access time t OE Output hold from address change t OH /CS to output in low impedance t CLZ ...

Page 10

Read Cycle Timing Chart Address (Input) /CS (Input) /OE (Input) I/O (Output) Remark In read cycle, /WE should be fixed to high level ACS t CLZ OLZ High impedance Data Sheet ...

Page 11

Write Cycle (1/2) Parameter Symbol Write cycle time t WC /CS to end of write t CW Address valid to end of write t AW Write pulse width t WP Data valid to end of write t DW Data hold ...

Page 12

Write Cycle Timing Chart 1 (/WE Controlled) Address (Input) /CS (Input /WE (Input) I/O (Input / Output) Indefinite data out Cautions 1. /CS or /WE should be fixed to high level during address transition. 2. When I/O pins ...

Page 13

Write Cycle Timing Chart 2 (/CS Controlled) Address (Input) /CS (Input) /WE (Input) High impedance I/O (Input) Cautions 1. /CS or /WE should be fixed to high level during address transition. 2. When I/O pins are in the output state, ...

Page 14

Low V Data Retention Characteristics (T CC Parameter Data retention supply voltage Data retention supply current Chip deselection to data retention mode Operation recovery time μ μ 40 °C °C) ≤ ≤ Note ...

Page 15

Package Drawings 28-PIN PLASTIC TSOP(I) (8x13. NOTES 1. Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. 2. "A" excludes mold flash. (Includes mold flash ...

Page 16

PLASTIC TSOP(I) (8x13. NOTE 1. Each lead centerline is located within 0. its true position (T.P.) at maximum material condition. 2. "A" excludes mold flash. (Includes mold flash : 8.4mm MAX.) ...

Page 17

Recommended Soldering Conditions Please consult with our sales offices for soldering conditions of the Types of Surface Mount Device μ PD43256BGW-xxX-9JL : 28-pin PLASTIC TSOP(I) (8x13.4) (Normal bent) μ PD43256BGW-xxX-9KL : 28-pin PLASTIC TSOP(I) (8x13.4) (Reverse bent) μ PD43256BGW-AxxX-9JL : ...

Page 18

Revision History Edition/ Page Type of Date This Previous revision edition edition 6th edition/ p.1 p.1 Deletion Jun. 2006 18 Location (Previous edition → This edition) − Description of Version X has been deleted. Data Sheet M11012EJ6V0DS μ PD43256B-X Description ...

Page 19

NOTES FOR CMOS DEVICES 1 VOLTAGE APPLICATION WAVEFORM AT INPUT PIN Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between V malfunction. Take care ...

Page 20

The information in this document is current as of June, 2006. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or data books, etc., for the most ...

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