em65567 ELAN Microelectronics Corp, em65567 Datasheet - Page 23

• Manufacturer Part Number: em65567
• Description: Com/ Color Driver
• Manufacturer: ELAN Microelectronics Corp

16-bits bus size access
The addresses, X Address and Y Address are possible to be set up so that they can increment automatically with the address
control register. The increment is made every time display RAM is read or written from MPU. In the Y-direction, 288 bits of
data are read out to the display data latch circuit by internal operation when the LP rises in a one-line cycle. They are output
from the display data latch circuit when the LP fails. When FLM signals being output in one frame cycle are at “H”, the
values in the display starting line register are preset in the line counter and the line counter counts up at the falling of LP
signals. The display line address counter is synchronized with each timing signal of the LCD system to operate and is
independent of address counters X and Y.
7.7 Display RAM Data and LCD (only monochrome mode)
One bit of display RAM data corresponds to one dot of LCD. Normal display and reverse display by REV register are set up
as follows.
Normal display (REV=0): RAM data = “0” not lighted
Reverse display (REV=1): RAM data = “0” lighted
7.8 Segment Display Output Order/Reverse Set up
The order of display output, SEGA0, SEGB0, SEGC0 to SEGA95, SEGB95, and SEGC95 can be reversed. If REF control
bit set to “1”, display by reversing access to display RAM from MPU by using REF register, lessen the limitation in placing
IC when assembling an LCD panel module.
* This specification is subject to be changed without notice.
Y-address
0H 16bit
41H 16bit
0H
16bit
0H
X-address
--------------------------------------------------------------------- 11H
Plane 0
RAM data = “1” not lighted
RAM data = “1” lighted
------------------------------------------------------------------
Plane 1
23
66 COM/ 96 SEG 256 Color STN LCD Driver
16bit
16bit
16bit
16bit
11H
2003/1/9 (V0.1)
EM65567