DS1867 DALLAS [Dallas Semiconductor], DS1867 Datasheet
DS1867
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DS1867 Summary of contents
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... SOIC and 20-pin TSSOP for surface mount applications § Standard resistance values: - DS1867- DS1867- DS1867-100 ~ 100 k § Operating Temperature Range: - Industrial: - +85 C PIN DESCRIPTION L0 Low End of Resistor H0 High End of Resistor ...
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... Both potentiometers can be stacked for increased total resistance with the same resolution. For multiple-device, single-processor environments, the DS1867 can be cascaded for control over a single 3-wire bus. The DS1867 is offered in three standard resistance values. ...
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... DS1867 BLOCK DIAGRAM Figure DS1867 102199 ...
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... TIMING DIAGFRAMS Figure 3-Wire Serial Interface General Overview DS1867 102199 ...
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... CASCADE OPERATION A feature of the DS1867 is the ability to control multiple devices from a single processor. Multiple DS1867s can be linked or daisy-chained as shown in Figure data bit is entered into the I/O shift register of the DS1867 it will appear at the C signal input should be taken to a low state to prevent any inadvertent ...
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... When the CLK input transitions low to high, bit 17 is loaded into the first position of the I/O shift register and bit 16 becomes present on C bits (or 17 times the number of DS1867s in the daisy chain), the data has shifted completely around and back to its original position. When same as before the read occurred) is loaded into the wiper-0, wiper-1, and stack select bit I/O register ...
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... POWER-DOWN EEPROM TIMING REQUIREMENTS Figure 6 TYPICAL APPLICATION CONFIGURATIONS Figures 7 and 8 show two typical application configurations for the DS1867. By connecting the wiper terminal of the part to a high impedance load, the effects of the wiper resistance is minimized, since the wiper resistance can vary from 400 to 1000 ohms depending on wiper voltage. Figure 7 presents the device connected in an inverting variable gain amplifier ...
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... MI by equation (2). Eq: (2) Relative Linearity RL = {Vo(n+1) - Vo(n)}/MI Figure plot of absolute linearity and relative linearity versus wiper position for the DS1867 The specification for absolute linearity of the DS1867 is 0.75 MI typical. The specification for relative linearity of the DS1867 is 0.30 MI typical. LINEARITY MEASUREMENT CONFIGURATION Figure 9 ...
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... DS1867 102199 ...
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... 250 STBY 2.5 PU1 3 REC (- +85 C) MAX UNITS 5 +0 +0.8 V GND =5V ± 10%) CC MAX UNITS 900 µA +1 µA 1000 µ 4.2 4 DS1867 NOTES NOTES 11,14 102199 ...
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... CC MAX UNITS +20 % LSB LSB Hz dB/(Hz)1/2 ppm MAX UNITS ± 10%) CC MAX UNITS 10 MHz ± 10%) CC MAX UNITS DS1867 NOTES NOTES 3 3 NOTES 13,15 13, NOTES 16 102199 ...
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... DS1867-010; 1 MHz, DS1867-050; 200 kHz, DS1867-100; 100 kHz active regardless of the state of OUT 9. Power-down time is specified at a minimum the time required for the DS1867 to guarantee wiper position storage as V 10. This is the time from power trip-point min (3.9V) to 3.0V to guarantee wiper storage. 11 the time required before the DS1867 stored wiper position becomes valid on power-up ...
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... ABSOLUTE AND RELATIVE LINEARITY Figure 10 DIGITAL OUTPUT LOAD SCHEMATIC Figure 11 Absolute and Relative Linearity (Normalized to 1 LSB DS1867 102199 ...
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... TYPICAL SUPPLY CURRENT VS. SERIAL CLOCK RATE Figure 12 Serial Clock Rate (bits/second DS1867 102199 ...