ra8872 displaytech, ra8872 Datasheet
ra8872
Available stocks
Related parts for ra8872
ra8872 Summary of contents
Page 1
... Character/Graphic TFT LCD Controller RAiO Technology Inc. ©Copyright RAiO Technology Inc. 2010 RAiO TECHNOLOGY INC. RAiO RA8872 Specification Version 1.1 September 14, 2010 1/148 www.raio.com.tw ...
Page 2
... Update pin description of Section 4-4 : ADC_VDD、ADC_GND 2. Update Section 5-9：REG[88h] - the reference setting of OSC clock (FIN) and REG[88h] Bit[4:0]. 3. Update Figure 6-17、Figure 6-20. 4. Update Table 8 Characteristic (Description of PLL Clock parameter) 5. Update Figure 10-2 (Add part model and parameter). 6. Update Chapter 11: Demo Program. 2/148 RA8872 www.raio.com.tw ...
Page 3
... Display RAM Read / Write....................................................................................................48 6-1-5 Interrupt and Wait................................................................................................................. 49 6-1-5-1 Interrupt .....................................................................................................................49 6-1-5-2 Wait............................................................................................................................ 50 6-1-6 Data Format........................................................................................................................... 51 6-2 Color Setting Mode ............................................................................................ 52 6-3 LCD Interface ...................................................................................................... 53 6-4 Touch Panel I/F ................................................................................................... 56 6-5 PWM .................................................................................................................... 58 6-6 Clock and PLL .................................................................................................... 59 6-7 Reset ................................................................................................................... 61 6-8 Power .................................................................................................................. 63 6-8-1 Power Pin Description .........................................................................................................63 6-8-2 Power Architecture............................................................................................................... 63 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller 3/148 www.raio.com.tw RA8872 Page ...
Page 4
... Block Memory Access ............................................................................................... 89 7-7-3-2 Linear Memory Access ..............................................................................................89 7-7-4 BTE Function Explaination..................................................................................................90 7-7-4-1 Write BTE with ROP ..................................................................................................90 7-7-4-2 Read BTE (Burst Read like function)......................................................................... 92 7-7-4-3 Move BTE in Positive Direction with ROP.................................................................93 7-7-4-4 Move BTE in Negative Direction with ROP ...............................................................95 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller 4/148 www.raio.com.tw RA8872 ...
Page 5
... Sleep Mode ....................................................................................................... 127 8. AC/DC Characteristic ........................................................................... 128 8-1 Maximum Absolute Limit ................................................................................. 128 8-2 DC Characteristic ............................................................................................. 129 9. Package................................................................................................. 130 9-1 Pin Assignment ................................................................................................ 130 9-2 Package Outline ............................................................................................... 131 9-3 Product Number ............................................................................................... 131 10. Application Circuit.............................................................................. 132 11. Demo Program.................................................................................... 134 12. Summary of Register Table ............................................................... 142 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller 5/148 www.raio.com.tw RA8872 ...
Page 6
... Version 1.1 Preliminary 1. Description RA8872 is a TFT LCD controller which supports the character and graphic mixed display designed to meet the requirement of middle size TFT module up to 320x240 pixels with characters or 2D graphic application. With internal RAM, RA8872 can supports 65K color for 320x240 dots TFT Panel, 4K color for 640x240 display color for 320x240 dots with 2-Layers ...
Page 7
... Cursor Engine 2D-BTE Scroll Engine Engine Figure 3-1 : Internal Block Diagram TFT Driver Booster (Back-light Adj.) RA8872 4-Wires Touch Panel Crystal Figure 3-2 : System Block Diagram 7/148 RA8872 CGROM Font Engine PDAT[0:15] HSYNC TCON VSYNC PCLK DE PWM1 PWM PWM2 GPIO[0:5] GPIO TEST[0:2] Test TFT Panel www ...
Page 8
... The interrupt output for MCU to indicate the status of RA8872. Wait Signal Output This is a WAIT output to indicate the RA8872 is in busy state. The 36 RA8872 can’t access MCU cycle when WAIT# pin is active active low and could be used for MCU to poll busy status by connecting it to I/O port ...
Page 9
... YN Signal for Touch Panel 7 Touch Panel control signal. This pin connects to YN switch signal of 4-wires touch panel. PWM Output 33, PWM output pins. The duty could be programmed by register 34 setting. General Purpose I/O These signals are used as GPIO signals; user can program it by register. 9/148 RA8872 www.raio.com.tw ...
Page 10
... Crystal Output Pin 29 Output pin for internal crystal circuit. Reset Signal Input This active-low input performs a hardware reset on the RA8872 Schmitt-trigger input for enhanced noise immunity; however, care should be taken to ensure that it is not triggered if the supply voltage is lowered. ...
Page 11
... IO power input 16, 31, GND 35, IO Cell/Core ground signals. 50, 51 RAiO RA8872L3N 1012 Date code (Year 2010, 12th week Figure 4-1 : Pin Assignment 11/148 RA8872 55 GND TEST2 TEST1 TEST0 RST# INT# WAIT# GND 35 ...
Page 12
... RA8872 includes a status register and tens of instruction registers. The status register can be read only. If MCU executes the read cycle to RA8872 while /RS pin is setting high, then the data of status will be read back to MCU. If MCU executes the write cycle to RA8872 while RS pin is setting high, it means that MCU will write a command to RA8872 ...
Page 13
... PDAT is fetched at PCLK falling edge. 6-2 NA PCLK Pulse Width Setting(PPWS) 1-0 Pixel clock (PCLK) width setting. PCLK= System Clock / ( (2^(Layer Setting Control + 1)) * (2^( PPWS) ) RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description 13/148 RA8872 Default Access Default Access -- ...
Page 14
... TFT, ie. 4K colors. 3 16-bpp generic TFT, ie. 65K colors. The Bit5 of SYSR must be cleared to 0 when the display color depth is less than 4096 color which means that RA8872 must use internal SRAM only. 1-0 Must keep 00. REG[11h] Panel Data Type Register (DRGB) ...
Page 15
... First dot First dot Description Description is the input buffer of GPIO N N. the written buffer of GPIO . N N Description Description 15/148 RA8872 Default Access Default Access Default Access Default ...
Page 16
... REG[1Bh] LCD Vertical Non-Display Period Register (VNDR0) Bit Vertical Non-Display Period Bit[7:0] 7-0 Vertical Non-Display Period(Line) = (VNDR + 1) RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description = (HNDR + 1)*8 + HNDFTR Description Description Description Description Description 16/148 RA8872 Default Access Default Access Default Access 0 ...
Page 17
... VSYNC Polarity Low active High active. VSYNC Pulse Width[6:0] The pulse width of VSYNC. 6-0 VSYNC Pulse Width(Line) = (VPWR + 1) RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description Description 17/148 RA8872 Default Access Default Access 0 RW Default Access ...
Page 18
... Layer Setting Control 0 : One layer configuration is selected Two layers configuration is selected.. 7 Note 1: The bit is only available when the size is below 320x240. Note 2: This bit must be set to zero, when RA8872 is operated at Internal SRAM and color depth is 16-bpp(65K colors). 6-4 NA HDIR Horizontal Scan direction, for n = SEG number. ...
Page 19
... Vertical Display Scroll Offset [7:0] 7-0 The display offset of the vertical direction, changing the value will cause the effect of scrolling at vertical direction. RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description Description Description 19/148 RA8872 Default Access ...
Page 20
... Character / Graphic TFT LCD Controller Description Description Active window Active window 瑞 佑 科 技 瑞 佑 科 技 Font line distance Font line distance Figure 5-3 : Character Line Distance 20/148 RA8872 Default Access Default Access ...
Page 21
... REG[37h] Vertical End Point of Active Window 1 (VEAW1) Bit 7 Vertical End Point of Active Window [8] RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description Description Description Description Description Description 21/148 RA8872 Default Access 0 RW Default Access Default Access 0 RW Default Access 0 ...
Page 22
... Horizontal End Point of Scroll Window [9:8] RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller (HSAW,VSAW) (HSAW,VSAW) Active Window Active Window (HEAW,VEAW) (HEAW,VEAW) Figure 5-4 : Active Window Description Description Description Description Description Description 22/148 RA8872 Default Access 0 RW Default Access Default Access 0 RW Default Access 0 ...
Page 23
... REG[3Fh] Vertical End Point 1 of Scroll Window (VESW1) Bit 7 Vertical End Point of Scroll Window [8] RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description (HSSW,VSSW) (HSSW,VSSW) Scroll Window Scroll Window (HESW,VESW) (HESW,VESW) Figure 5-5 : Scroll Window 23/148 RA8872 Default Access 0 RW Default Access www.raio.com.tw ...
Page 24
... Both of them can be set as auto increasing or not. The cursor moving directions are also programmable and the moving range is dominated by the setting of active window. Graphic cursor are used as a 32x32 pixels graphic pattern, RA8872 provides 8 sets of graphic cursors that can be programmed by customers. User can set the display position by register. ...
Page 25
... REG[47h] Memory Write Cursor Horizontal Position Register 1 (CURH1) Bit 7-2 NA 1-0 Memory Write Cursor Horizontal Location[9:8] RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description Description Description Description 25/148 RA8872 0 RW Default Access FFh RW Default Access 0 RW Default Access 0 RW Default ...
Page 26
... Down then Left 11b : Down Top then Left RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description Description Description Description Description Down. Down. Right. Right. 26/148 RA8872 Default Access 0 RW Default Access Default Access 0 RW Default Access 0 ...
Page 27
... ROP for the detailed function. (Please refer to the Section 7-7) BTE Operation Code Bit[3:0] RA8872 includes a 2D BTE Engine, it can execute 13 BTE functions, the operation code range is from 1100 to 0000 and 3-0 1111 to 1101 are not used. Some of BTE Operation Code has to collocate with the ROP code for the advance function ...
Page 28
... Bit Source Layer Selection Layer Layer 2. 6 Vertical Source Point of BTE [8] RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description Description Description 28/148 RA8872 Default Access Default Access 0 RW Default Access Default Access ...
Page 29
... BTE Height Setting[7:0] REG[5Fh] BTE Height Register 1 (BEHR1) Bit 7-2 NA 1-0 BTE Height Setting [9:8] RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description Description Description Description Description Description 29/148 RA8872 Default Access 0 RW Default Access Default Access 0 RW Default Access 0 RW ...
Page 30
... Bit[4:1]. If REG[10h] Bit[3:2] is set to 65K colors, the register only uses Bit[4:0]. Note: For pattern fill transparency function, only Bit[4:2] is valid. RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description Description 30/148 RA8872 Default Access Default Access ...
Page 31
... REG[67h] Background Color Register for Transparent (BGTR) Bit Background Color for Transparent Mode 7-0 Background color of transparent with 256 color RGB format [7:0] = RRRGGGBB. RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description Description 31/148 RA8872 Default Access Default Access Default ...
Page 32
... REG[0Fh] Bit2. 1 Latch X data, in the phase, X Data can be latched in REG[72h] and REG[74h Latch Y data, in the phase, Y Data can be latched in REG[73h] and REG[74h]. RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description 32/148 RA8872 Default Access Default ...
Page 33
... Touch event detection bit, the bit is only available at manual mode. 6-4 NA 3-2 Touch Panel Y Data Bit[1:0] (Common) 1-0 Touch Panel X Data Bit[1:0] (Segment) RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description 33/148 RA8872 Default Access 0 RW Default Access 0 RW Default Access ...
Page 34
... REG[85h] Graphic Cursor Color 1 (GCC1) Bit Graphic Cursor Color 1 with 256 Color 7-0 RGB Format [7:0] = RRRGGGBB. RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description Description Description Description 34/148 RA8872 Default Access 0 RW Default Access Default Access 0 RW ...
Page 35
... Version 1.1 Preliminary 5-9 PLL Setting Registers REG[88h] PLL control Register 1 (PLLC1) Bit PLLDIVM PLL Pre-driver 0 : divided divided by 2. The system clock of RA8872 is generated by oscillator and 7 internal PLL circuit. The following formula is used for system clock calculation: SYS_CLK = FIN* ( PLLDIVN [4: PLLDIVM 2^PLLDIVK [2: 6-5 NA PLLDIVN[4:0] 4-0 PLL input parameter, the value should be 1~63 ...
Page 36
... Character / Graphic TFT LCD Controller Description PWM1 = Fin / 16 1000b : SYS_CLK / 256 1001b : SYS_CLK / 512 1010b : SYS_CLK / 1024 1011b : SYS_CLK / 2048 1100b : SYS_CLK / 4096 1101b : SYS_CLK / 8192 1110b : SYS_CLK / 16384 1111b : SYS_CLK / 32768 Description 36/148 RA8872 Default Access ...
Page 37
... Character / Graphic TFT LCD Controller Description PWM2 = SYS_CLK / 16 1000b : SYS_CLK / 256 1001b : SYS_CLK / 512 1010b : SYS_CLK / 1024 1011b : SYS_CLK / 2048 1100b : SYS_CLK / 4096 1101b : SYS_CLK / 8192 1110b : SYS_CLK / 16384 1111b : SYS_CLK / 32768 Description 37/148 RA8872 Default Access ...
Page 38
... CLK REG[8Eh] Memory Clear Control Register (MCLR) Bit Memory Clear Function 0 : End or Stop. When write 0 to this bit RA8872 will stop the 7 Memory clear function read back this bit indicates that Memory clear function is complete Start the memory clear function. ...
Page 39
... Touch Panel Interrupt Clear Bit Touch Panel Interrupt Status BTE Process Complete Interrupt Clear Bit BTE interrupt status BTE MCU R/W Interrupt Enable Bit BTE R/W Interrupt Status Font Write Interrupt Enable Bit Font Write Interrupt Status 39/148 RA8872 Default Access ...
Page 40
... Draw Circle Figure 5-7 : Drawing Function Parameter RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description (DLHSR, DLVSR) (DLHSR, DLVSR) (DLHER, DLVER) Draw Square Radius (DCHR, DCVR) Draw Circle Fill 40/148 RA8872 Default Access (DLHER, DLVER) Draw Square Fill ...
Page 41
... REG[99h] Draw Circle Center Horizontal Address Register0 (DCHR0) Bit 7-0 Draw Circle Center Horizontal Address[7:0] RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description Description Description Description Description Description Description 41/148 RA8872 Default Access 0 RW Default Access Default Access 0 RW Default Access ...
Page 42
... NA 0 Draw Circle Center Vertical Address[8] REG[9Dh] Draw Circle Radius Register (DCRR) Bit 7-0 Draw Circle Radius[7:0] RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Description Description Description Description 42/148 RA8872 Default Access Default Access 0 RW Default Access ...
Page 43
... The RA8872 supports 8080 and 6800 series MPU interface, the interface is decided by C86 pin clear the C86 pin to logic low, and then the MCU interface of RA8872 is defined as 8080 series. If the C86 is connected to logic high, then the MCU interface of RA8872 is used as 6800 series. Please refer to the Figure 6-1 and Figure 6-2 ...
Page 44
... Character / Graphic TFT LCD Controller t CYC6 t t AW6 EW t DS6 t ACC6 Figure 6-3 : 6800 MCU Waveform Table 6-1 : 6800 MCU I/F Timing Rating Unit Min. Max. 2* 44/148 RA8872 t AH6 t DH6 t OH6 Symbol tc is one system clock period 1/SYS_CLK www.raio.com.tw ...
Page 45
... In order to reduce the transmission interference between MPU interface and RA8872, we suggest that a small capacitor to the GND should be added at the signal of CS#, RD#, WR#. If use cable to connect MCU and RA8872, please keep the cable lengh less than 20cm. Otherwise the we recommend add 1~10Kohm pull-up resistors on pins CS#, RD#, WR# and RS. ...
Page 46
... Write”, “Data Read”, “Command Write” and “Status read” have introduced in the Chapter 5, the status register is a read only register. If MCU executes the read cycle to RA8872 while /RS pin is setting high, then data of status register will be read back to MCU. Please refer to the Figure 6-5 ...
Page 47
... DB [7:0] Figure 6-6 : Register Write/Register Read If we want to read the register contents of RA8872, it has to execute the command write cycle first, and then the second access cycle must use “Data Read cycle”. Please refer to the Figure 6-6 (2). But please note that the Figure 6-6 is based on 8080 interface. ...
Page 48
... Note: The memory might be display memory or Character Generation RAM (CGRAM). RS CS# WR# RD# DB[7:0] 02h RS CS# WR# RD# DB[7:0] 02h Figure 6-7 : Memory Write/Memory Read RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller DA TA1 DATA2 (1) Memory Write (Write Data to DDRA M) DA TA1 DATA2 (2) Memory Read (Rea d Data from DDRAM) 48/148 RA8872 DATAn DATAn www.raio.com.tw ...
Page 49
... Interrupt and Wait RA8872 provides an interrupt pin “INT#” for triggering the external interrupt pin of MCU, it also supports an output signal pin “WAIT#” which can indicate RA8872 is busy or not. Both of the two signals are active at logic low. Please refer to the Figure 6-1 and Figure 6-2. ...
Page 50
... Version 1.1 Preliminary 6-1-5-2 Wait RA8872 also provides a wait signal, when the busy flag is cleared to “0”, it means that RA8872 is busy and can not be accessed the DDRAM. There are three ways in which busy may occur : 1． When RA8872 is set as text mode for writing FONT, RA8872 need different processing time for differnert FONT sizes to write to DDRAM, RA8872 can’ ...
Page 51
... Data Format RA8872 supports the 8-bit/12-bit/16-bit color depth TFT-LCD Panel, i.e. 256, 4K and 65K colors TFT-LCD panel. As the number of bits increases, the number of possible colors becomes impractically large for a color map higher color depths, the color value typically directly encodes relative brightness’ ...
Page 52
... Color Setting Mode There are 16 bits data bus of the logic TFT driver interface of RA8872, supporting up to 65K colors data format. By the setting of the register, RA8872 can provides 256 colors or 4K colors data format in 16 bit TFT interface to achieve the same display effect. About the register setting of color mode, please refer to REG[10h](SYSR) Bit 3-2, the definition of data format is described below ...
Page 53
... The Table 6-4 is the interface description for the digital TFT-LCD application of RA8872. The related timing as Figure 6-11 and the application circuit please refer to the Figure 6-12. The PWM output of RA8872 could used to control the LED back-light of TFT Panel. Please refer to Section 6-6 and application circuit of Chapter 10 for the detail description. ...
Page 54
... HND PCLK DE FPDATA 8080 MCU A0 A1-A7/A1-A15 IORQ DATA[7: RES WAIT INT Figure 6-12 : The Interface of RA8872 and Digital TFT RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller VPW VND VDH LINE 1 HDW Valid Data Figure 6-11 : Digital TFT Panel Timing RA8872 RS VSYNC ...
Page 55
... Version 1.1 Preliminary RA8872 contains 230Kbytes internal display memory and the maximum resolution is 640x240 pixels with 4K color depth. Please refer to the Table 6-5. Table 6-5 : DDRAM Demand and Display Resolution DDRAM Demand Internal Internal Internal Internal Internal RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Display Layer No ...
Page 56
... Using RA8872 4-wires Touch Panel function only need to connect the Touch Panel signals – XP, XN, YP and YN to RA8872. It will continuously monitor the panel and wait for touch event. When the event is occurred, a divided voltage on panel caused by touch is sensed and transferred by ADC to determine the location ...
Page 57
... YP pin when using Touch Panel function. The pin ADC_VREF is the reference voltage input of ADC. The Bit5 of Register [71h] is used to select the reference voltage is from external or generated by RA8872. When use external reference voltage, it need only add two resistors to generated 1/2 VDD (±5%) for ADC_VREF. And have to add a capacitor (1~10uF) to GND to increase the stability of ADC ...
Page 58
... Version 1.1 Preliminary 6-5 PWM RA8872 provides 2 channels programmable PWM (Pulse Width Modulation) for backlight adjustment or the other application. The PWM frequency and duty can be set by register. Besides, the driving capability of PWM pin is larger than other output pin about 4 multiples. Figure 6-16 shows the reference circuit of PWM contrast backlight application. This designed so that PWM duty cycle 0%~100% varies LED current from 20mA~0mA ...
Page 59
... Version 1.1 Preliminary 6-6 Clock and PLL The system clock of RA8872 is generated by an external crystal connected between pins XI and XO (15MHz~30MHz). From this clock source an internal circuit “PLL” generates a clock source which is required by the system of RA8872, the system clock of RA8872 can be divided into different frequency by PLL circuit or register adjustment (REG[88h] and [89h]) ...
Page 60
... Version 1.1 Preliminary RA8872 supports the variety of LCD modules; the setting of clock depending on different resolution of LCD module is list at below table. Table 6-6 : Clock Setting for Different Display Application DDRAM Display Demand Resolution 320x240 Internal 320x240 Internal 320x240 Internal 320x480 Internal 640x240 Internal RAiO TECHNOLOGY INC ...
Page 61
... If the oscillator frequency is 25Mhz, then the Reset pulse is at least 40.96µs. For maximum reliability not recommended to apply a DC voltage to the LCD panel while the RA8872 is reset. Turn off the LCD power supplies for at least one frame period after the start of the reset pulse. ...
Page 62
... Version 1.1 Preliminary When reset RA8872 (RST# = Low), please refer to Table 6-7 for the status of relative output signal. Table 6-7: The Reset Status of Relative Output Signal WAIT#, INT# PWM1, PWM2 GPIO[5:0] PDAT[15:0] VSYNC, HSYNC PCLK, DE RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Sig na l Name ...
Page 63
... Power Pin Description RA8872 operates at 3.3V IO power and 1.8V core power. User can provide the 3.3V only for chip LDO source and ADC/OSC IO signals. The internal LDO will generate the 1.8V power source for Oscillator to guarantee the stability of the clock source. For the reason of chip reliability not suggested to connect the LDO output as the power source of other devices ...
Page 64
... Version 1.1 Preliminary 7. Function Description 7-1 Screen Rotation RA8872 provide the function of 90 degree, 180 degree and 270 degree display rotation to fit different type of LCD panel. For example: panel size of 240x320 and 320x240. 7-1-1 Normal MEMORY SCAN SEQUENCE RA8872 Figure 7-1 : Memory and Panel Scan Direction in Normal ...
Page 65
... MEMORY SCAN SEQUENCE RA8872 RA8872 Figure 7-4 : Memory and Panel Scan Direction in Rotate 270 Degree RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller PANEL DISPLAY PANEL DISPLAY RAiO RAiO RAiO RAiO RAiO RAiO RAiO 65/148 RA8872 RA8872 RA8872 RA8872 PANEL DISPLAY PANEL DISPLAY www.raio.com.tw ...
Page 66
... The RA8872 provides both horizontal scroll and vertical scroll. 7-2-1 Horizontal Scroll The RA8872 provides horizontal scroll feature. Users could flexibly assign the scrolling range in the display area and by increasing or decreasing the value of offset as the unit of pixels. Users can achieve the effect of block scrolling. Please refer to Figure 7-5 as the display example. ...
Page 67
... Panel Panel Act Window Act Window x x Figure 7-8 : Active Window in 180 and 270 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Panel Panel Act Window Act Window Panel Panel 67/148 RA8872 Act Window Act Window y y www.raio.com.tw ...
Page 68
... The later provides a text relative cursor that can be set for height and width. Besides, RA8872 also support “Pattern” function. The “Pattern” print with 8x8 pixels of size and at most 12bpps color depth for each pixel ...
Page 69
... Degree 270 Degree Figure 7-10 : Graphic Cursor Position and Direction after Rotation RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller 90 Degree 90 Degree 90 Degree 180 Degree 180 Degree 180 Degree RAiO RAiO RAiO RAiO RAiO RA8872 RA8872 RA8872 RA8872 RA8872 69/148 RA8872 www.raio.com.tw ...
Page 70
... Cursor Blinking The user could control cursor on/off or blinking. The register BTCR(REG[44h]) is used to set up blinking. Blinking time = BTCR[44h]*(1/Frame_Rate). RAiO 瑞佑科技 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Figure 7-11 : Cursor Blinking 70/148 RA8872 www.raio.com.tw ...
Page 71
... Figure 7-12 and Figure 7-13 as example. Figure 7-12 : Cursor Movement for Normal Font Figure 7-13 : Cursor Movement for Vertical Font RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Table 7-1 : Cursor Height and Width RAiO RAiO 瑞佑科技 瑞佑科技 71/148 RA8872 www.raio.com.tw ...
Page 72
... Version 1.1 Preliminary 7-4-3 Pattern The RA8872 have pattern memory that for writing pattern data in it pattern function active, the specified pattern memory data will fill in specify area. The RA8872 Pattern memory can use REG[41h], [66h] to specify pattern memory. In RA8872 memory have 256 pattern memories, each have 8x8 pixels. Internal RAM is 12-bit width MCU interface is 8-bit mode, and MCU write 8-bit data in, RA8872 will be expansion 8-bit 12-bit ...
Page 73
... Internal Font ROM The RA8872 embedded 8x16 dots ASCII Font ROM that user can write the font into DDRAM by using standard font code. The embedded ASCII Font ROM supports ISO8859-1~4 font. Besides, user can choose the font foreground color by setting the REG[42h] and background color by setting the REG[43h] ...
Page 74
... Rhaeto-Romanic, Scottish Gaelic, Spanish, Swedish. English letters with no accent marks also can use ISO 8859-1. In addition, it also commonly used in many languages outside Europe, such as Swahili, Indonesian, Malaysian and Tagalong. RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Table 7-3 : ASCII Block 1(ISO 8859-1) 74/148 RA8872 www.raio.com.tw ...
Page 75
... Serbian, English, German, Latin can use ISO 8859-2 as well. Furthermore it is suitable to represent some western European languages like Finnish (with the exception of å used in Swedish and Finnish) RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Table 7-4 : ASCII Block 2(ISO 8859-2) 75/148 RA8872 www.raio.com.tw ...
Page 76
... Turkish, Maltese and Esperanto, though the introduction of ISO 8859-9 superseded it for Turkish. The encoding remains popular with users of Esperanto and Maltese, though it also supports English, German, Italian, Latin and Portuguese. RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Table 7-5 : ASCII Block 3(ISO 8859-3) 76/148 RA8872 www.raio.com.tw ...
Page 77
... European” is the forth part of the ISO 8859 8-bit character encoding. It was designed originally to cover Estonian, Greenlandic, Latvian, Lithuanian, and Sami. This character set also supports Danish, English, Finnish, German, Latin, Norwegian, Slovenian, and Swedish. RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Table 7-6 : ASCII Block 4(ISO 8859-4) 77/148 RA8872 www.raio.com.tw ...
Page 78
... CGRAM The RA8872 supports 256 half size or 128 full size CGRAM space that lets user can create fonts or symbols they want. User just writes the font or symbol data to the indicated space and then writes the corresponding font code, RA8872 will write the font or symbol to the DDRAM. Also, user can choose the font foreground color by setting the REG[42h] and background color by setting the REG[43h] ...
Page 79
... Version 1.0 Preliminary 7-5-3 90 Degree Font The RA8872 supports the 90 degree font write by setting the REG[22h] Bit4 = 1. And collocating the VDIR(REG[20h] Bit2), LCD module can show the 90 degree font. 7-5-4 Bold, Enlargement, Transparent Font RA8872 also supports font bold (REG[22h] Bit5), enlargement (REG[22h] Bit[3:0]), and transparent function(REG[22h] Bit6) ...
Page 80
... Font Change Line when Setting Write Auto Move RA8872 supports the auto move of font write and it will auto change line with active window. By setting REG[40h] Bit1 = 0, the position of font will move automatically and change line when the font over the range of horizontal or vertical active window. Refer the below figure to view the behavior of auto move. 技 ...
Page 81
... Circle Input RA8872 supports draw circle function let user can draw circle on the DDRAM only use few MCU cycles. By setting the center of a circle REG[99h~9Ch] ,the radius of a circle REG[9Dh] and the color of circle REG[42h], and then setting start draw REG[90h] Bit6 = 1, RA8872 will draw a corresponding circle on the DDRAM ...
Page 82
... MCU cycles. By setting the start point of a square REG[91h~94h] ,the end point of a square REG[95h~98h] and the color of a square REG[42h], then setting draw a square REG[90h] Bit4 = 1 and start draw REG[90h] Bit7 = 1, RA8872 will draw a corresponding square on the DDRAM. Moreover, user can fill the square by setting REG[90h] Bit5 = 1. The procedure of drawing square ...
Page 83
... Line Input RA8872 supports draw line function let user can draw line on the DDRAM only use few MCU cycles. By setting the start point of a line REG[91h~94h] ,the end point of a line REG[95h~98h] and the color of a line REG[42h], then setting draw a line REG[90h] Bit4 = 0 and start draw REG[90h] Bit7 = 1, RA8872 will draw a corresponding line on the DDRAM ...
Page 84
... MCU, and user checks the interrupt status to confirm the BTE status. When BTE is operating suggested that the user should not write command to RA8872 except REG[02h] or REG[8Fh] to prevent the un-expected result. Please note the BTE function must use under Graphic Mode (REG [40h] Bit7 = 0) ...
Page 85
... Version 1.0 Preliminary Table 7-7describes 13 BTE operation modes of RA8872, if the operation code is “0000”, “0010”, “0011” and “0110” then it has to collocate with raster operation code for the variety functions. Please refer to Table 7-8. REG[51h] Bit[7:4] Note: 1. ROP Function S: Source Data, D: Destination Data. ...
Page 86
... Bit7 Bit7 Bit8 Bit8 Bit9 Bit9 Bit10 Bit10 Bit11 Bit11 Bit12 Invalid Bit13 Invalid Bit14 Invalid Bit15 Invalid 86/148 RA8872 Color Depth = 256 colors Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Invalid Invalid Invalid Invalid Invalid Invalid Invalid Invalid www.raio.com.tw ...
Page 87
... The Transparent Move BTE supports block transfers from DDRAM ram to DDRAM ram in positive direction only. When the source color is equal to key color, which is defined in BTE Background Color Register, the destination area is not updated. For this BTE no raster operation is applied. RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller 87/148 RA8872 www.raio.com.tw ...
Page 88
... BTE Foreground Color to the DDRAM. The MEM data is 0 expands BTE Background Color Register to the DDRAM. If background transparency is enabled, then the destination MEM data will remain. RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller 88/148 RA8872 www.raio.com.tw ...
Page 89
... The below example shows both the source and destination address are defined as linear access method. Source Linear Figure 7-27 : Linear memory access of BTE function RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Destination Address Destination Address Total Process Data length = BTE Width * High Destination Linear 89/148 RA8872 www.raio.com.tw ...
Page 90
... Setting Destination position RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller RA8872 DDRAM Figure 7-28 : Write BTE with ROP REG[58h], [59h], [5Ah], [5Bh] REG[5Ch], [5Dh] REG[5Eh], [5Fh] REG[51h REG[50h] Bit7 = 1 Figure 7-29 : After BTE Function REG[8Fh] REG[58h], [59h], [5Ah], [5Bh] 90/148 RA8872 www.raio.com.tw ...
Page 91
... Wait for Interrupt generate 12. Clear INTC BTE Read/Write status 13. Continue run step 9,10,11,12 until image data = block image data. Or check STSR Bit6 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller REG[5Ch], [5Dh] REG[5Eh], [5Fh] REG[51h] = C0h REG[50h] Bit7 = 1 REG[8Fh] Bit0 = 1 REG[8Fh] Bit0 = 1 91/148 RA8872 www.raio.com.tw ...
Page 92
... TECHNOLOGY INC. Character / Graphic TFT LCD Controller RA8872 DDRAM Figure 7-30 : Read BTE REG[54h], [55h], [56h], [57h] REG[5Ch], [5Dh] REG[5Eh], [5Fh] REG[51h] = 01h REG[50h] Bit7 = 1 REG[8Fh] REG[54h], [55h], [56h], [57h] REG[5Ch], [5Dh] REG[5Eh], [5Fh] REG[51h] = 01h REG[50h] Bit7 = 1 REG[8Fh] Bit1 = 1 92/148 RA8872 www.raio.com.tw ...
Page 93
... Enable BTE function 6. Check STSR REG Bit6 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Destination Source REG[54h], [55h], [56h], [57h] REG[58h], [59h], [5Ah], [5Bh] REG[5Ch], [5Dh], [5Eh], [5Fh] REG[51h] Bit[3: REG[50h] Bit7 = 1 check 2D final Figure 7-32 : Before BTE Function 93/148 RA8872 www.raio.com.tw ...
Page 94
... Version 1.0 Preliminary RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Figure 7-33 : After BTE Function 94/148 RA8872 www.raio.com.tw ...
Page 95
... Enable BTE function 6. Check STSR REG Bit6 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Source Destination REG[54h], [55h], [56h], [57h] REG[58h], [59h], [5Ah], [5Bh] REG[5Ch], [5Dh], [5Eh], [5Fh] REG[51h] Bit[3: REG[50h] Bit[ check 2D final Figure 7-35 : Before BTE Function 95/148 RA8872 www.raio.com.tw ...
Page 96
... Version 1.0 Preliminary RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Figure 7-36 : After BTE Function 96/148 RA8872 www.raio.com.tw ...
Page 97
... MCU. Unlike “Write BTE” operation, the “Transparent Write BTE” will ignore the operation of a dedicated color that is set as “Transparent Color”. In RA8872, the “Transparent Color” is set as “BTE Foreground Color“ in the “Transparent Write BTE” operation. When the source color of the operation meets the “ ...
Page 98
... Continue run step 9,10,11,12 until image data = block image data. Or Check STSR Bit6 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Figure 7-39 : After BTE Function REG[8Fh] REG[58h], [59h], [5Ah], [5Bh] REG[5Ch], [5Dh] REG[5Eh], [5Fh] REG[51h] = C4h REG[50h] Bit7 = 1 REG[8Fh] Bit0 = 1 REG[8Fh] Bit0 = 1 98/148 RA8872 www.raio.com.tw ...
Page 99
... Write” source comes from system memory or MCU and “Transparent Move” source comes from DDRAM. Because the source is DDRAM, the direction of the operation must be defined. RA8872 supports positive direction only for “Transparent Move” function. The source of “Transparent Move BTE” may be specified as linear mode or rectangle mode, depending on the user setting ...
Page 100
... Check STSR REG Bit6 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Pattern Panel Display Result Figure 7-42 : Pattern Fill with ROP Figure 7-43 : Before BTE Function 100/148 RA8872 REG[58h], [59h], [5Ah], [5Bh] REG[5Ch], [5Dh], [5Eh], [5Fh] REG[51h] Bit[3:0] = 06h REG[50h] Bit7 = 1 check 2D final www.raio.com.tw ...
Page 101
... Version 1.0 Preliminary RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Figure 7-44 : Pattern Figure 7-45 : After BTE Function 101/148 RA8872 www.raio.com.tw ...
Page 102
... Check STSR Bit6 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Pattern Pattern Panel Display result , if set blue color is transparency color REG[58h], [59h], [5Ah], [5Bh] REG[5Ch], [5Dh], [5Eh], [5Fh] REG[63h], [64h], [65h] REG[51h] Bit[3:0] = 07h REG[50h] Bit7 = 1 check 2D final 102/148 RA8872 www.raio.com.tw ...
Page 103
... Version 1.0 Preliminary RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Figure 7-47 : Before BTE Function Figure 7-48 : Pattern Image Figure 7-49 : After BTE Function 103/148 RA8872 www.raio.com.tw ...
Page 104
... Mono Mono MPU MPU Color Color Bitmap Bitmap Color Image RAIO production RAIO production is very good is very good 104/148 RA8872 DDRAM REG[58h], [59h], [5Ah], [5Bh] REG[5Ch], [5Dh] REG[5Eh], [5Fh] REG[60h], [61h], [62h] REG[63h], [64h], [65h] REG[51h] Bit[3:0] = 08h REG[50h] Bit7 = 1 www.raio.com.tw ...
Page 105
... RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller REG[8Fh] REG[58h], [59h], [5Ah], [5Bh] REG[5Ch], [5Dh] REG[5Eh], [5Fh] REG[60h], [61h], [62h] REG[63h], [64h], [65h] REG[51h] Bit[3:0] = 08h REG[50h] Bit7 = 1 REG[8Fh] Bit0 = 1 Figure 7-51 : Before BTE Function Figure 7-52 : After BTE Function 105/148 RA8872 www.raio.com.tw ...
Page 106
... Character / Graphic TFT LCD Controller start bit = BTE Width REG [58h] [59h] setting 106/148 RA8872 MPU send to RA8870 data,The data have 8bit for one transmitter data, and serial send D0,D1,D2 ,D3, RA8870 Not Expansion BTE High REG [5Ah] [5Bh] setting www.raio.com.tw ...
Page 107
... Continue run step 6, 7 until image data = block image data. Or Check STSR Bit6 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller RA8872 MPU DDRAM Color Image RAIO production is very good REG[58h], [59h], [5Ah], [5Bh] REG[5Ch], [5Dh] REG[5Eh], [5Fh] REG[63h], [64h], [65h] REG[51h] Bit[3:0] = 09h REG[50h] Bit7 = 1 107/148 RA8872 www.raio.com.tw ...
Page 108
... Continue run step until image data = block image data. Or check STSR Bit6 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Destination address RAIO production Is very good . REG[8Fh] REG[58h], [59h], [5Ah], [5Bh] REG[5Ch], [5Dh] REG[5Eh], [5Fh] REG[51h] Bit[3:0] = 09h REG[50h] Bit7 = 1 REG[8Fh] Bit0 = 1 108/148 RA8872 www.raio.com.tw ...
Page 109
... Color Image Mono color Bitmap Color expansion Color Image RAIO production is very good REG[54h], [55h], [56h], [57h] REG[58h], [59h], [5Ah], [5Bh] REG[5Ch], [5Dh], [5Eh], [5Fh] REG[60h], [61h], [62h] REG[63h], [64h], [65h] REG[51h] Bit[3:0] = 0Ah REG[50h] Bit7 = 1 check 2D final 109/148 RA8872 www.raio.com.tw ...
Page 110
... Version 1.0 Preliminary RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Figure 7-57 : Before BTE Function Figure 7-58 : After BTE Function 110/148 RA8872 www.raio.com.tw ...
Page 111
... Setting BTE operation and ROP function 6. Enable BTE function 7. Check STSR REG Bit6 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller REG[54h], [55h], [56h], [57h] REG[58h], [59h], [5Ah], [5Bh] REG[5Ch], [5Dh], [5Eh], [5Fh] REG[63h], [64h], [65h] REG[51h] Bit[3:0] = 0Bh REG[50h] Bit7 = 1 check 2D final 111/148 RA8872 www.raio.com.tw ...
Page 112
... Setting foreground Color 5. Enable BTE function 6. Check STSR REG Bit6 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Figure 7-60 : Solid Fill REG[58h], [59h], [5Ah], [5Bh] REG[5Ch], [5Dh], [5Eh], [5Fh] REG[51h] Bit[3:0] = 0Ch REG[63h], [64h], [65h] REG[50h] Bit7 = 1 check 2D final 112/148 RA8872 www.raio.com.tw ...
Page 113
... Version 1.0 Preliminary 7-8 Layer Mixed Function RA8872 provides two layers display function, when two layers configuration of DPCR(REG[20h] Bit7=1) is selected, users could use LTPR0(REG[52h]), LTPR1(REG[53h]) and BGTR(REG[67h]) to generate different combination effect of layer one and layer two. The function of LTPR0, LTPR1 and BGTR refer to Table 7-11. ...
Page 114
... BGTR to show similar the effect of filter. Refer to the following example as Figure 7-62. RA8872 RAiO RAiO RAiO Layer 1 Layer 1 LTPR0 B[2:0]= 3’b000 Figure 7-62 : Effect of Register LTPR1 and BGTR RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Layer 2 RAiO Layer 1 Figure 7-61 : Only Layer One is Visible + LTPR1 B[3:0] = 4’b0100 BGTR B[7:0] = 8’hE0 114/148 RA8872 RAiO = www.raio.com.tw ...
Page 115
... BGTR. About the display effect please refer to the example of Figure 7-65. Key Color RAiO Layer 1 RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Layer 2 Layer 2 RA8872 RA8872 Layer 1 Layer 1 Figure 7-63 : Only Layer Two is Visible + LTPR1 B[7:4] = 4’b0100 BGTR B[7:0] = 8’h1C Layer 2 + RA8872 Figure 7-65 : Effect of Transparent 115/148 RA8872 = RA8872 RAiO = www.raio.com.tw ...
Page 116
... Character / Graphic TFT LCD Controller =χ[r,g,b] +(1- χ)[r,g,b] Layer 1 =1/2[r,g,b] + 1/2[r,g,b] Layer 1 Layer 2 + RA8872 Figure 7-66 : Effect of Light-Overlay Layer 2 Layer RA8872 RA8872 Figure 7-67 : Boolean OR Layer 2 Layer RA8872 RA8872 Figure 7-68 : Effect of Boolean AND 116/148 RA8872 Layer 2 Layer 2 . RAiO RAiO = RA8872 RAiO RAiO = = RA8872 RA8872 RAiO RAiO = = 8872 8872 www.raio.com.tw ...
Page 117
... We support three kinds of scroll mode for user to apply. You could scroll only layer one or only layer two and also could scroll two layers at the same time. Figure 7-69 : Effect of Layer 1 and Layer 2 Scroll Mode RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller 117/148 RA8872 www.raio.com.tw ...
Page 118
... Touch Panel Function The 1 channel and 10 bits resolution A/D converter are implemented in RA8872 for 4-wires Touch Panel application. The operation method and application information please refer to Chapter 6-4. There are two types of ADC operating mode for user selection: Auto mode or Manual mode. When using the manual mode, the touch Event can be detected by an Interrupt signal or the flag detecting (Polling flag status depend on the system configuration ...
Page 119
... XY coordinates are manual operated by programmer. The advantage of using Manual Mode is it allows programmer more flexible applications. In the condition that is over the range of RA8872 register setting, the user can still use the software method to control the TP function in a correct way. ...
Page 120
... Delay Time for Data Stability (Reg[72h], Reg[73h], Reg[74h]) Latch Y Data (Reg [71h] [1:0] = 11) Clear TP INT Status (Reg[8Fh Delay Time for Data Stability Wait for TP event Mode (Reg[71h] [1:0] = 01) 120/148 RA8872 Other TP IDLE Mode Functions Cause the Interrupt Read X,Y – axis . . . . . Execute Function www.raio.com.tw ...
Page 121
... Mode selection for TP manual Mode Touch Panel Interrupt Mask Touch Panel Detect Status Bit Touch Panel X Data Bit[9:2] (Segment) Touch Panel Y Data Bit[9:2] (Common) Touch Panel Y Data Bit[1:0] (Common) Touch Panel X Data Bit[1:0] (Segment) 121/148 RA8872 Reference REG[70h] REG[71h] REG[8Fh] REG[72h] REG[73h] REG[74h] ...
Page 122
... Figure 7-73 : T/P Programming Procedure for the Polling Mode RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Start Set Auto Mode valid 100 times ? invalid 122/148 RA8872 Latch X Data (REG[71h][1:0] = 10) Delay Enoug h Time Latch Y Data (REG[71h][1:0] = 11) Delay Enough Time Read X,Y - axis (Read Reg[72h], Reg[73h] , Reg[74h]) ...
Page 123
... If the touch event is unstable, it might need a de-bounced solution to make sure the touch event is valid. The bit5 of STSR is only active at “Manual mode”. When setting RA8872 to “Auto-mode, the touch event will be automatically checked. Only the valid touch event will cause the interrupt. ...
Page 124
... Character / Graphic TFT LCD Controller 10M 20M 30M 000 -- -- 000 -- -- 000 000 000 001 001 000 010 010 001 011 011 010 100 100 011 101 101 100 124/148 RA8872 40M 50M -- -- -- -- -- -- 000 000 001 001 010 010 011 011 100 100 www.raio.com.tw ...
Page 125
... Version 1.0 Preliminary 7-10 PWM RA8872 provide two set of programmable PWM (Pulse Width Modulation). The PWM frequency and duty can be set by register. Besides, if the PWM function is disabled, it can use as normal output signal. The relative function setting please refers to the Table 7-17 as below. Reg. Bit_Num ...
Page 126
... System Clock = 10Mhz, Register P1CR Bit[3:0] = 0001b T Register P1DCR Bit[7:0] = 0Fh T T Figure 7-75 : Example 2 of PWM_OUT Pulse RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller T PWM T L Clock Source = 10MHz/2 = 5MHz = 256*(1/5MHz) = 51.2µs PWM = 16*(1/5MHz) = 3.2µ (256-16) * (1/ 5MHz) = 48µs L 126/148 RA8872 www.raio.com.tw ...
Page 127
... The device provides two wake-up methods for quitting sleep mode, one is to clear the bit1 of register [01h The other is to set the bit3 of register [70h before RA8872 enters the sleep mode, and then we can quit the sleep mode by touch event occurring. ...
Page 128
... All supply voltages are referenced to GND = 0V. RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Table 8-1 : Absolute Maximum Ratings Symbol OPR SOLDER 128/148 RA8872 Value Unit 3.0V~3. ≦ -30 to +85 ℃ -45 to +125 ℃ 260 ℃ www.raio.com.tw ...
Page 129
... OPR 250 DISPLAY SLP = 3.3V, Oscillator Clock = 10MHz, System Clock = 25MHz, DD =25 . ℃ A 129/148 RA8872 Max. Unit Condition 3.6 V Add External 1uF 2.0 V Capacitor Add External 1uF -- V Capacitor 20 MHz MHz ...
Page 130
... PDAT15 ○ RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller RAiO RA8872L3N 1012 Date code (Year 2010, 12th week Figure 9-1 : RA8872 Pin Assignment 130/148 RA8872 GND TEST2 TEST1 TEST0 40 40 ...
Page 131
... Package Outline Figure 9-2 : RA8872 Outline Dimensions 9-3 Product Number The complete product number of RA8872 is “RA8872L3N”, RAiO is dedicated to environmental protection and Now RAiO has already started to supply customers with environmentally friendly Lead Free devices in order to reduce or eliminate hazardous substances contained within the packaging. ...
Page 132
... Version 1.0 Preliminary 10. Application Circuit The Figure 10-2 is application circuit of RA8872. It provides the 8-bit MCU interface, and FPC connector interface for TFT Module. Figure 10-2 also shows the PWM to control back-light power circuit. The following Figure 10-1 is the block diagram of the application circuit. USB1 USB I/F ...
Page 133
... Version 1.0 Preliminary RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller Figure 10-2 : Application Circuit 133/148 RA8872 www.raio.com.tw ...
Page 134
... RAiO provides the “C” base demo program and related sub-routinethe for end user development. In addition, the related demo program for RA8872 is also available on our web site, it will help user to speed up the product development process and improves time to market. Please visit the website “ ...
Page 135
... Data = DATA_BUS DATA_BUS = 0xff return Data; } void LCD_DataWrite(uchar Data DATA_BUS = Data DATA_BUS = 0xff RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller RAIO // Command Write // Command Read ( Read Register ) // Data Write 135/148 RA8872 www.raio.com.tw ...
Page 136
... Data = DATA_BUS DATA_BUS = 0xff return Data ========== Hardware Reset =========== void LCD_Reset(void) { RST = 0; Delay100ms(1); RST = 1; Delay100ms(1); } void RA8872_PLL_ini(void) { LCD_CmdWrite(0x88); LCD_DataWrite(0x07); LCD_CmdWrite(0x89); LCD_DataWrite(0x03); Delay1ms(1); LCD_CmdWrite(0x01); LCD_DataWrite(0x01); LCD_DataWrite(0x00); Delay100ms(1); } RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller // Data Read // Read Status Register ...
Page 137
... Version 1.0 Preliminary // ========== RA8872 Initialization =========== void LCD_Initial(void) { RA8872_PLL_ini(); LCD_CmdWrite(0x10); LCD_DataWrite(0x3C); LCD_DataWrite(0x0C); LCD_CmdWrite(0x12); LCD_DataWrite(0x00); LCD_CmdWrite(0x13); LCD_DataWrite(0x00); // Horizontal Set LCD_CmdWrite(0x14); LCD_DataWrite(0x27); LCD_CmdWrite(0x15); LCD_DataWrite(0x02); LCD_CmdWrite(0x16); LCD_DataWrite(0x03); LCD_CmdWrite(0x17); LCD_DataWrite(0x01); LCD_CmdWrite(0x18); LCD_DataWrite(0x03); // Vertical Set LCD_CmdWrite(0x19); LCD_DataWrite(0xef); LCD_CmdWrite(0x1a); LCD_DataWrite(0x00); LCD_CmdWrite(0x1b); LCD_DataWrite(0x0F); LCD_CmdWrite(0x1c); LCD_DataWrite(0x00); LCD_CmdWrite(0x1d); LCD_DataWrite(0x0e); LCD_CmdWrite(0x1e); LCD_DataWrite(0x06); LCD_CmdWrite(0x1f); ...
Page 138
... LCD_CmdWrite(0x42); LCD_DataWrite(temp ========== Subroutine for background color setting =========== void Text_Background_Color(uint color) { uchar temp; temp=color; LCD_CmdWrite(0x43); LCD_DataWrite(temp); } RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller //HSAW0 //HSAW1 //HEAW0 //HEAW1 //VSAW0 //VSAW1 //VEAW0 //VEAW1 //MCLR //MCLR //TFCR //TBCR 138/148 RA8872 www.raio.com.tw ...
Page 139
... Subroutine for circle coordinates and radius =========== void Circle_Coordinate_Radius(uint X,uint Y,uint R) { uchar temp; temp=X; LCD_CmdWrite(0x99); LCD_DataWrite(temp); temp=X>>8; LCD_CmdWrite(0x9a); LCD_DataWrite(temp); temp=Y; LCD_CmdWrite(0x9b); LCD_DataWrite(temp); temp=Y>>8; LCD_CmdWrite(0x9c); LCD_DataWrite(temp); temp=R; LCD_CmdWrite(0x9d); LCD_DataWrite(temp); } RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller //MCLR //MCLR 139/148 RA8872 www.raio.com.tw ...
Page 140
... Subroutine for showing text =========== void Show_String(uchar *str,uint n) { LCD_CmdWrite(0x02); while(*str != '\0') { LCD_DataWrite(*str); ++str; Chk_Busy(); } Delay1ms(n ========== Subroutine for Busy flag checking =========== void Chk_Busy(void) { //uchar temp //temp=LCD_StatusRead(); //}while((temp&0x80)==0x80); } while(LCD_StatusRead()&0x80); } RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller //MWCR0 //MWCR0 140/148 RA8872 www.raio.com.tw ...
Page 141
... RAiO TECHNOLOGY INC. Character / Graphic TFT LCD Controller } } } } 0x01 0x02 0x04 0x08 0x10 0x20 0x40 0x80 0xfe 0xfd 0xfb 0xf7 0xef 0xdf 0xbf 0x7f 141/148 RA8872 www.raio.com.tw ...
Page 142
... HSYNC PWM Register. VPWR[4: LCD Vertical Display Height Register LCD Vertical Non-Display Period Register VSYNC Start Position Register VSYNC PWM Register. VPWR[6:0] 142/148 RA8872 Character / Graphic TFT LCD Controller Description www.raio.com.tw ...
Page 143
... Font Control Register 1. TX_RT TX_H[1:0] TX_V[1: CGRAM Select Register Horizontal Scroll Offset Register Vertical Scroll Offset Register Font Line Distance Setting Register. TX_DIST[4:0] 143/148 RA8872 Character / Graphic TFT LCD Controller Description www.raio.com.tw ...
Page 144
... Horizontal Start Point of Scroll Window Vertical Start Point of Scroll Window Horizontal End Point of Scroll Window Vertical End Point of Scroll Window 144/148 RA8872 Character / Graphic TFT LCD Controller Description www.raio.com.tw ...
Page 145
... Memory Write Cursor Vertical Position Register Memory Read Cursor Horizontal Position Register Memory Read Cursor Vertical Position Register MRD_D[1:0] Memory Read Cursor Direction. 145/148 RA8872 Character / Graphic TFT LCD Controller Description www.raio.com.tw ...
Page 146
... BTE Foreground Color Register – RED. FC_GREEN[5:0] BTE Foreground Color Register – GREEN. FC_BLUE[4:0] BTE Foreground Color Register – BLUE Pattern Set Number for BTE Background Color Register for Transparent. 146/148 RA8872 Character / Graphic TFT LCD Controller Description www.raio.com.tw ...
Page 147
... Graphic Cursor Vertical Position Register Graphic Cursor Color Selection – Graphic Cursor Color Selection – 1. DB4 DB3 DB2 DB1 DB0 PLLDIVN[4:0] PLL Control Register 0. PLLDIVK[2:0] PLL Control Register 1. 147/148 RA8872 Character / Graphic TFT LCD Controller Description Description Description www.raio.com.tw ...
Page 148
... Draw Line / Square Vertical End Address Register Draw Circle Center Horizontal Address Register Draw Circle Center Vertical Address Register Draw Circle Radius Register. 148/148 RA8872 Character / Graphic TFT LCD Controller Description Description www.raio.com.tw ...