DS28CN01U-A00+ MAXIM [Maxim Integrated Products], DS28CN01U-A00+ Datasheet - Page 4

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DS28CN01U-A00+

Manufacturer Part Number
DS28CN01U-A00+
Description
1Kb I2C/SMBus EEPROM with SHA-1 Engine
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
1Kb I
ELECTRICAL CHARACTERISTICS (continued)
(T
Note 12: The DS28CN01 does not obstruct the SDA and SCL lines if V
Note 13: The minimum SCL clock frequency is limited by the bus timeout feature. If the CM bit is 1 and SCL stays at the same logic
Note 14: System requirement.
Note 15: The DS28CN01 provides a hold time of at least 300ns for the SDA signal (referred to the V
Note 16: The master can provide a hold time of 0ns minimum when writing to the device. This 0ns minimum is guaranteed by
Note 17: A fast-mode I
The DS28CN01 features a serial I
1Kb of SHA-1 secure EEPROM, a register page, and a
unique registration number, as shown in the Block
Diagram . The device communicates with a host proces-
sor through its I
mode. The user can switch the interface from I
mode to SMBus mode. Two 4-level address pins allow
16 DS28CN01s to reside on the same bus segment.
Read and write access to the DS28CN01 is controlled
through the I
DS28CN01 has memory areas and registers of different
characteristics, there are several special cases to con-
sider. See the Read and Write section in the full data
sheet for details.
4
A
PIN
3, 7
= -40°C to +85°C.) (Note 1)
_______________________________________________________________________________________
1
2
4
5
6
8
level or SDA stays low for this interval, the DS28CN01 behaves as though it has sensed a STOP condition.
bridge the undefined region of the falling edge of SCL.
design, characterization, and/or simulation only, and not production tested.
then be met. This is automatically the case if the device does not stretch the low period of the SCL signal. If such a device
does stretch the low period of the SCL signal, it must output the next data bit to the SDA line t
= 1250ns (according to the standard-mode I
NAME
GND
AD0
AD1
N.C.
SDA
SCL
V
CC
2
2
C/SMBus EEPROM with SHA-1 Engine
2
C/SMBus serial interface. Since the
C interface in standard mode or in fast
Device Address Input Pin to Select the Slave Address. Sets slave address bits A[1:0] and must be
connected to either GND, SDA, SCL, or V
Device Address Input Pin to Select the Slave Address. Sets slave address bits A[3:2] and must be
connected to either GND, SDA, SCL, or V
No Connection
Ground Supply
I
I
Power-Supply Input
2
2
C/SMBus Bidirectional Serial Data Line. This pin must be connected to V
C/SMBus Serial Clock Input. This pin must be connected to V
2
C bus device can be used in a standard-mode I
Detailed Description
ABRIDGED DATA SHEET
Device Operation
2
C/SMBus interface,
2
2
C bus specification) before the SCL line is released.
C bus
CC
CC
.
.
The serial interface uses a data line (SDA) plus a clock
signal (SCL) for communication. Both SDA and SCL are
bidirectional lines, connected to a positive supply volt-
age through a pullup resistor. When there is no commu-
nication, both lines are high. The output stages of
devices connected to the bus must have an open-drain
or open-collector output to perform the wired-AND
function. Data can be transferred at rates of up to
100kbps in the standard mode, and up to 400kbps in
the fast mode. The DS28CN01 works in both modes.
A device that sends data on the bus is defined as a
transmitter and a device receiving data is a receiver.
The device that controls the communication is called a
master. The devices that are controlled by the master
are slaves. The DS28CN01 is a slave device.
FUNCTION
cc
2
is switched off.
C bus system, but the requirement t
CC
Serial Communication Interface
through a pullup resistor.
CC
IH(MIN)
through a pullup resistor.
RMAX
Pin Description
of the SCL signal) to
+ t
SU:DAT
SU:DAT
≥ 250ns must
= 1000 + 250

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