A2505PM-F AMICC [AMIC Technology], A2505PM-F Datasheet - Page 7

• Manufacturer Part Number: A2505PM-F
• Description: 16 Mbit, Low Voltage, Serial Flash Memory With 85MHz SPI Bus Interface
• Manufacturer: AMICC [AMIC Technology]

Table 1. Protected Area Sizes
A25L16PT Top Boot Block
A25L16PU Bottom Boot Block
Hold Condition
The Hold (
communications with the device without resetting the
clocking sequence. However, taking this signal Low does not
terminate any Write Status Register, Program or Erase cycle
that is currently in progress.
To enter the Hold condition, the device must be selected,
with Chip Select (
The Hold condition starts on the falling edge of the Hold
(
(C) being Low (as shown in Figure 3.).
The Hold condition ends on the rising edge of the Hold
(
(C) being Low.
If the falling edge does not coincide with Serial Clock (C)
being Low, the Hold condition starts after Serial Clock (C)
next goes Low. Similarly, if the rising edge does not coincide
Figure 3. Hold Condition Activation
PRELIMINARY
Note: 1. The device is ready to accept a Bulk Erase instruction if, and only if, all Block Protect (BP2, BP1, BP0) are 0.
Note: 1. The device is ready to accept a Bulk Erase instruction if, and only if, all Block Protect (BP2, BP1, BP0) are 0.
HOLD
HOLD
BP2 Bit
BP2 Bit
Status Register Content
Status Register Content
0
1
0
1
2. The sector 0 include sector 0-0, sector 0-1, sector 0-2, sector 0-3 and sector 0-4.
2. The sector 31 include sector 31-0, sector 31-1, sector 31-2, sector 31-3 and sector 31-4.
) signal, provided that this coincides with Serial Clock
) signal, provided that this coincides with Serial Clock
HOLD
BP1 Bit
BP1 Bit
0
1
0
1
S
(April, 2007, Version 0.6)
) Low.
) signal is used to pause any serial
HOLD
BP0 Bit
BP0 Bit
C
0
1
0
1
none
All sectors (32 sectors: 0 to 31)
none
All sectors (32 sectors: 0 to 31)
Protected Area
Protected Area
(standard use)
Condition
Hold
6
with Serial Clock (C) being Low, the Hold condition ends
after Serial Clock (C) next goes Low. This is shown in Figure
3.
During the Hold condition, the Serial Data Output (DO) is
high impedance, and Serial Data Input (DIO) and Serial
Clock (C) are Don’t Care.
Normally, the device is kept selected, with Chip Select (
driven Low, for the whole duration of the Hold condition. This
is to ensure that the state of the internal logic remains
unchanged from the moment of entering the Hold condition.
If Chip Select (
condition, this has the effect of resetting the internal logic of
the device. To restart communication with the device, it is
necessary to drive Hold (
Chip Select (
back to the Hold condition.
Memory Content
Memory Content
(non-standard use)
Condition
S
Hold
S
) Low. This prevents the device from going
All sectors
none
All sectors
none
) goes High while the device is in the Hold
AMIC Technology Corp.
1
1
HOLD
(32 sectors: 0 to 31)
(32 sectors: 0 to 31)
Unprotected Area
Unprotected Area
A25L16P Series
) High, and then to drive
S
)