mx98743 Macronix International Co., mx98743 Datasheet - Page 9

• Manufacturer Part Number: mx98743
• Description: 100 Base Fast Ethernet Management Chip
• Manufacturer: Macronix International Co.

140, 139,
137-133,
131-128,
126-125
112-115,
118-121
PIN#
PIN#
124
123
110
111
62
MSA[12:0]
CLK50M
MWEX_
MD[7:0]
MOEX_
RESET
NAME
NAME
TEST
I/O, TTL
I, TTL
I, TTL
I, TTL
I/O
I/O
O
O
O
SRAM Address. 13-bit address to select the minimum 8Kbytes memory.
SRAM Data Bus.
SRAM Read Enable. Active low.
SRAM Write Enable. Active low.
50 MHz Oscillator Input. This is the clock reference for SRAM Interface bus
timing.
Reset. Reset is active low and places all the MX98743 logic in a reset mode.
Test Pin. This is the internal test pin which is internal pulled low. User can
either leave it uncommented or tie it to ground for normal operation.
Table 5-6. Miscellaneous Pins, 2 pin
Table 5-5. SRAM Interface, 24 pins
9
DESCRIPTION
DESCRIPTION
MX98743
INDEX