LP3971SQ-A514 NSC [National Semiconductor], LP3971SQ-A514 Datasheet
LP3971SQ-A514
Related parts for LP3971SQ-A514
LP3971SQ-A514 Summary of contents
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LP3971 Power Management Unit for Advanced Application Processors General Description The LP3971 is a multi-function, programmable Power Man- agement Unit, designed especially for advanced application processors. The LP3971 is optimized for low power hand- held applications and provides 6 low ...
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Simplified Application Circuit Connection Diagrams and Package Mark Information Note: Circle marks pin 1 position. www.national.com 40-Pin Leadless Leadframe Package NS Package Number SQF40A 2 20180701 20180702 ...
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... Ordering Information Option Default Voltage version – A** Default Voltage version – A** ‘Default Voltage version - B Default Voltage version - Released Default V Coding OUT Package Mark 20180704 Top View Order Number Package Marking LP3971SQ-A514 71-A514 LP3971SQX-A514 71-A514 LP3971SQ-B410 71-B410 LP3971SQX-B410 71-B410 Z Default V 0 1 ...
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Pin Descriptions Pin # Name 1 PWR_ON 2 nTEST_JIG 3 SPARE 4 EXT_WAKEUP 5 FB1 LDO1 OUT 8 V LDO2 OUT 9 nRSTI 10 GND1 11 V REF 12 V LDO3 OUT 13 V LDO4 ...
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Applications Schematic Diagrams Diagram 1 LDO 4 and LDO5 Connected To V See Application Hints for recommended external components and component selection ** NOTE: RTC LDO – In applications when Vbatt drops below 1.7V (ie. removing the main battery), system ...
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Applications Schematic Diagrams Diagram 2 LDO 4 and LDO5 Connected To 1.8V Supply www.national.com (Continued) 6 20180707 ...
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Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. All Inputs GND to GND SLUG Junction Temperature (T ) J-MAX Storage Temperature Power Dissipation (T = 70˚C) (Note ...
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LDO RTC Unless otherwise noted 3.6V appearing in normal type apply for T range for operation, −40˚C to +125˚C. (Notes and (Note 10) Symbol Parameter V Output Voltage Accuracy OUT Accuracy ∆V Line ...
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LDO Unless otherwise noted 3.6V appearing in normal type apply for T range for operation, −40˚C to +125˚C. (Notes 10, 11, 15) and (Note 16). Symbol Parameter V Output Voltage ...
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Back-Up Charger Electrical Characteristics Unless otherwise noted BATT pearing in boldface type apply over the entire junction temperature range for operation, −40˚C to +125˚C. (Notes 2, 6) and (Note 8). Symbol Parameter V Operational Voltage Range ...
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I C Compatible Serial Interface Electrical Specifications (SDA and SCL) Unless otherwise noted 3.6V. Typical values and limits appearing in normal type apply for T IN boldface type apply over the entire junction temperature range for operation, ...
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Input Test Signals FIGURE 1. Line Transient Response Input Test Signal www.national.com FIGURE 2. PSRR Input Test Signal 12 20180708 20180709 ...
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Functional Block Diagram 13 20180710 www.national.com ...
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Buck Converter Operation DEVICE INFORMATION The LP3971 includes three high efficiency step down DC-DC switching buck converters. Using a voltage mode architec- ture with synchronous rectification, the buck converters have the ability to deliver up to 1600 mA depending on ...
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Buck Converter Operation FIGURE 4. Typical PFM Operation During PFM operation, the converter positions the output voltage slightly higher than the nominal output voltage during PWM operation, allowing additional headroom for voltage drop during a load transient from light to ...
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Buck Converter Operation SHUTDOWN MODE During shutdown the PFET switch, reference, control and bias circuitry of the converters are turned off. The NFET switch will shutdown to discharge the output. When the converter is enabled, soft start ...
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I C Compatible Interface TRANSFERRING DATA Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) being transferred first. The number of bytes that can be transmitted per transfer is unrestricted. ...
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I C Register Definitions CONTROL REGISTERS Register Register Read/ Address Name Write 8h’02 ISR R 8h’07 SCR1 R/W 8h’0B BBCC R/W 8h’0E SCR2 R/W 8h’10 BOVEN R/W 8h’11 BOVSR R 8h’12 LDOEN R/W 8h’13 LDOVS R ...
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I C Register Definitions Bit Access Name 1 R WUPT 0 R WUPS SYSTEM CONTROL REGISTER 1 (SCR1) 8h’07 Bit 7 Designation BPSEN Reserved Reset Value 0 Note: Gray denotes EPROM programmable registers for default value. SYSTEM CONTROL REGISTER ...
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I C Register Definitions BACKUP BATTERY CHARGER CONTROL REGISTER (BBCC) 8h’0B Bit 7 Designation NBUB Reset Value 0 BACKUP BATTERY CHARGER CONTROL REGISTER (BBCC) 8h’0B DEFINITIONS Bit Access Name 7 R/W NBUB 6 R/W CNBFL 5:3 R/W BFLT 2 ...
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I C Register Definitions SYSTEM CONTROL REGISTER (SCR2) 8h’0E Bit 7 Designation BBCS Reset Value 1 SYSTEM CONTROL REGISTER (SCR2) 8h’0E DEFINITIONS Bit Access Name 7 R/W BBCS Sets GPIO1 as control input for Back Up battery charger 0 ...
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I C Register Definitions BUCKS OUTPUT VOLTAGE ENABLE REGISTER (BOVEN) 8h’10 Bit 7 Designation Reserved B2ENC Reset Value 0 BUCKS ENABLE REGISTER (BOVEN) 8h’10 DEFINITIONS Bit Access Name 7 ... ... 6 R/W B2ENC 5 ... ... 4 R/W ...
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I C Register Definitions LDO OUTPUT VOLTAGE ENABLE REGISTER (LDOEN) 8h’12 Bit 7 6 Designation L5EC L4EC Reset Value 0 0 LDO OUTPUT VOLTAGE ENABLE REGISTER (LDOEN) 8h’12 DEFINITIONS Bit Access Name 7 R/W L5EC Connects LDO5 enable to ...
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I C Register Definitions Bit Access Name 2 R LDO2_OK 1 R LDO1_OK 0 ... ... VOLTAGE CHANGE CONTROL REGISTER 1 (VCC1) 8h’20 Bit 7 Designation B3VS Reset Value 0 VOLTAGE CHANGE CONTROL REGISTER 1 (VCC1) 8h’20 DEFINITIONS Bit ...
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I C Register Definitions BUCK1 TARGET VOLTAGE 1 REGISTER (B1TV1) 8h’23 Bit 7 6 Designation Reserved Reset Value 0 0 BUCK1 TARGET VOLTAGE 1 REGISTER (B1TV1) 8h’23 DEFINITIONS Bit Access Name 7:5 ... ... Reserved 4:0 R/W B1OV Output ...
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I C Register Definitions BUCK 1 VOLTAGE RAMP CONTROL REGISTER (B1RC) 8h’25 Bit 7 Designation Reset Value 0 BUCK 1 VOLTAGE RAMP CONTROL REGISTER (B1RC) 8h’25 DEFINITIONS Bit Access Name 7:5 ... ... 4:0 R/W B1RS BUCK 2 TARGET ...
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I C Register Definitions BUCK 2 TARGET VOLTAGE 2 REGISTER (B2TV2) 8h’2A Bit 7 6 Designation Reserved Reset Value 0 0 BUCK 2 TARGET VOLTAGE 2 REGISTER (B2TV2) 8h’2A DEFINITIONS Bit Access Name 7:5 ... ... Reserved 4:0 R/W ...
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I C Register Definitions BUCK 3 TARGET VOLTAGE 1 REGISTER (B3TV1) 8h’32 Bit 7 Designation Reserved Reset Value 0 BUCK 3 TARGET VOLTAGE 1 REGISTER (B3TV1) 8h’32 DEFINITIONS Bit Access Name 7:5 ... ... 4:0 R/W B3OV BUCK 3 ...
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I C Register Definitions BUCK 3 VOLTAGE RAMP CONTROL REGISTER (B3RC) 8h’34 Bit 7 Designation Reset Value 0 BUCK 2 VOLTAGE RAMP CONTROL REGISTER (B2RC) 8h’34 DEFINITIONS Bit Access Name 7:5 ... ... Reserved 4:0 R/W B2RS DVM Ramp ...
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I C Register Definitions LDO2–LDO1 VOLTAGE CONTROL REGISTER (L21VCR) 8h’39 Bit 7 Designation LDO 2 Output Voltage (L20V) Reset Value 1 LDO2–LDO1 VOLTAGE CONTROL REGISTER (L21VCR) 8h’39 DEFINITIONS Bit Access Name 7:4 R/W L2OV 3:0 R/W L1OV www.national.com (Continued) ...
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I C Register Definitions LDO4–LDO3 VOLTAGE CONTROL REGISTER (L21VCR) 8h’3A Bit 7 6 Designation LDO 4 Output Voltage (L4OV) Reset Value 0 1 LDO4–LDO3 VOLTAGE CONTROL REGISTER (L21VCR) 8h’3A DEFINITIONS Bit Access Name 7:4 R/W L4OV 3:0 R/W L3OV ...
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I C Register Definitions VCC_LDO5 VOLTAGE CONTROL REGISTER (L5VCR) 8h’3B Bit 7 6 Designation Reset Value 0 0 VCC_LDO5 VOLTAGE CONTROL REGISTER (L5VCR) 8h’3B DEFINITIONS Bit Access Name 7:5 ... ... 4:0 R/W B1OV Serial interface register selection codes ...
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I C Register Definitions DVM TIMING FOR VCC APPS (Buck 1) LP3971 Controls DIGITAL INTERFACE CONTROL SIGNALS Signal SYS_EN High Voltage Power Enable PWR_EN Low Voltage Power Enable SCL Serial Bus Clock Line SDA Serial Bus ...
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LP3971 Controls (Continued active low or high (SPARE bit, Default is active low ‘1’). A reason for wakeup event can be read through I ible interface also. Additionally wakeup inputs have 30 ms WAKEUP Register Bits Reason for ...
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LP3971 Controls (Continued) GENERAL PURPOSE I/O FUNCTIONALITY (GPIO1 AND GPIO2) LP3971 has 2 general purpose I/Os for system control. I compatible interface will be used for setting any of the pins to LP3971 GPIO Control Table Controls < > < ...
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Application Note TYPICAL CONNECTION DIAGRAMS LP3971 is flexible for different system configurations. Differ- ent power domains can be selected based on current and voltage needs. Additionally Buck2 LDO4 and lDO5 default Typical Application Diagram with Advanced Applications Processor Version “A” ...
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Application Note (Continued) Typical Application Diagram with PXA27x Advanced Applications Processor Version “B” LP3971 & PXA27x START-UP Initial Cold Start Power On Sequence 1. The Back up battery is connected to the PMU, power is applied to the back-up battery ...
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Application Note (Continued) POWER-ON TIMING Symbol t1 Delay from VCC_RTC assertion to nRSTO de-assertion t3 Delay from nRST de-assertion to SYS_EN assertion t4 Delay from SYS_EN assertion to PWR_EN assertion t5 Delay from PWR_EN assertion to nRSTO de-assertion LP3971 & ...
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Application Hints LDO CONSIDERATIONS External Capacitors The LP3971’s regulators require external capacitors for regulator stability. These are specifically designed for por- table applications requiring minimum board space and small- est components. These capacitors must be correctly se- lected for good ...
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Application Hints (Continued) have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about 2:1 ...
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Application Hints (Continued) Because these two components are out of phase the rms value can be used to get an approximate value of peak-to- peak ripple. Voltage peak-to-peak ripple, root mean squared can be ex- pressed as follows TABLE 2. ...
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Physical Dimensions inches (millimeters) unless otherwise noted National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and ...