ETC5064N STMICROELECTRONICS [STMicroelectronics], ETC5064N Datasheet

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ETC5064N

Manufacturer Part Number
ETC5064N
Description
SERIAL INTERFACE CODEC/FILTER WITH RECEIVEPOWER AMPLIFIER
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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TS
September 2003
DESCRIPTION
The ETC5064 ( -law), ETC5067 (A-law) are mono-
lithic PCM CODEC/FILTERS utilizing the A/D and
D/A conversion architecture shown in the Block Dia-
grams and a serial PCM interface. The devices are
fabricated using double-poly CMOS process.
Similar to the ETC505X family, these devices fea-
ture an additional Receive Power Amplifier to pro-
vide push-pull balanced output drive capability. The
receive gain can be adjusted by means of two ex-
ternal resistors for an output level of up to
across a balanced 600
Also included is an Analog Loopback switch and
TEM INCLUDING :
SPECIFICATIONS.
3 mW
FACES
CUIT DENSITY
COMPLETE CODEC AND FILTERING SYS-
A-LAW ETC5067
MEETS OR EXCEEDS ALL D3/D4 AND CCITT
LOW OPERATING POWER-TYPICALLY 70 mW
POWER-DOWN STANDBY MODE-TYPICALLY
AUTOMATIC POWER DOWN
TTL OR CMOS COMPATIBLE DIGITAL INTER-
MAXIMIZES LINE INTERFACE CARD CIR-
0 C TO 70 C OPERATION: ETC5064/67
–40 C TO 85 C OPERATION: ETC5064-X/67-X
X
-
-
-
-
-
-
-
-
-LAW ETC5064
5 V OPERATION.
output.
Transmit high-pass and low-pass filtering.
Receive low-pass filter with sin x/x correction.
Active RC noise filter.
CODER.
Internal precision voltage reference.
Serial I/O interface.
Internal auto-zero circuitry.
Receive push-pull power amplifiers.
-law or A-law compatible CODER and DE-
®
SERIAL INTERFACE CODEC/FILTER WITH RECEIVE
load.
6.6 V
ORDERING NUMBERS:
ORDERING NUMBERS:
ORDERING NUMBERS:
POWER AMPLIFIER
ETC5064/64-X
ETC5067/67-X
ETC5064FN
ETC5064FN-X
ETC5067FN
ETC5067FN-X
(Plastic) N
ETC5064D
ETC5064D-X
ETC5067D
ETC5067D-X
ETC5064N
ETC5064N-X
ETC5067N
ETC5067N-X
PLCC20
DIP20
SO20
FN
D
1/18

Related parts for ETC5064N

ETC5064N Summary of contents

Page 1

... Also included is an Analog Loopback switch and TS output. X September 2003 ETC5064/64-X ETC5067/67-X POWER AMPLIFIER (Plastic) N ORDERING NUMBERS: ETC5064N ETC5064N-X ETC5067N ETC5067N-X ORDERING NUMBERS: ETC5064FN ETC5064FN-X ETC5067FN ETC5067FN-X ORDERING NUMBERS: 6.6 V ETC5064D ETC5064D-X ETC5067D ETC5067D-X ...

Page 2

ETC5064 - ETC5064-X - ETC5067 - ETC5067-X PIN CONNECTIONS (Top views) DIP20 & SO20 BLOCK DIAGRAM (ETC5064 - ETC5064-X - ETC5067 - ETC5067-X) 2/18 PLCC20 ...

Page 3

PIN DESCRIPTION Pin Name Type (*) + VPO O GNDA GND - VPO O VPI BCLK /CLKSEL I R MCKL /PDN I R MCLK I X ...

Page 4

ETC5064 - ETC5064-X - ETC5067 - ETC5067-X FUNCTIONAL DESCRIPTION POWER-UP When power is first applied, power-on reset circuitry initializes the device and places it into the power- down mode. All non-essential circuits are deacti- vated and the D and VF ...

Page 5

For 64 kHz operation, the frame sync pulses must be kept low for a minimum of 160 ns (see Fig 1). The D X buffer is enabled with the rising edge of FS rising edge of ...

Page 6

ETC5064 - ETC5064-X - ETC5067 - ETC5067-X ELECTRICAL OPERATING CHARACTERISTICS V = 5.0V 5 -5V 5%, GNDA = 0V otherwise noted; typical characteristics specified at V enced to GNDA. DIGITAL INTERFACE (All devices) Symbol V ...

Page 7

ELECTRICAL OPERATING CHARACTERISTICS (Continued) ANALOG INTERFACE WITH POWER AMPLIFIERS (all devices) Symbol IPI Input Leakage Current (– 1.0 V RIPI Input Resistance (– 1.0 VIOS Input Offset Voltage ROP Output Resistance (inverting unity–gain at VPO F Unity–gain Bandwidth, Open Loop ...

Page 8

ETC5064 - ETC5064-X - ETC5067 - ETC5067-X All TIMING SPECIFICATIONS Symbol 1/t Frequency of master clocks PM MCLK and MCLK X Depends on the device used and the BCLK /CLKSEL Pin R t Width of Master Clock High WMH t ...

Page 9

Figure 2 : Short Frame Sync Timing. ETC5064 - ETC5064-X - ETC5067 - ETC5067-X 9/18 ...

Page 10

ETC5064 - ETC5064-X - ETC5067 - ETC5067-X Figure 3 : Long Frame Sync Timing. 10/18 ...

Page 11

TRANSMISSION CHARACTERISTICS (all devices 0°C to 70°C (ETC5064-X/67- GNDA = 0V 1.02kHz 0dBm0 transmit input amplifier connected for unity–gain non–inverting. (unless IN otherwise specified). AMPLITUDE RESPONSE Symbol Absolute Levels - Nominal 0 ...

Page 12

ETC5064 - ETC5064-X - ETC5067 - ETC5067-X TRANSMISSION CHARACTERISTICS (continued). ENVELOPE DELAY DISTORTION WITH FREQUENCY Symbol D Transmit Delay, Absolute (f = 1600 Hz Transmit Delay, Relative 500 Hz-600 600 ...

Page 13

TRANSMISSION CHARACTERISTICS (continued). DISTORTION Symbol STD Signal to Total Distortion (sinusoidal test method STD Transmit or Receive Half-channel R Level = 3.0 dBm0 = 0 dBm0 to – 30 dBm0 = – 40 dBm0 = – 55 dBm0 ...

Page 14

ETC5064 - ETC5064-X - ETC5067 - ETC5067-X APPLICATION INFORMATION POWER SUPPLIES While the pins at the ETC506X family are well pro- tected against electrical misure recommended that the standard CMOS practice be followed, en- suring that ground is ...

Page 15

DIM. MIN. TYP. MAX. MIN. A 2.35 2.65 0.093 A1 0.1 0.3 0.004 B 0.33 0.51 0.013 C 0.23 0.32 0.009 D 12.6 13 0.496 E 7.4 7.6 0.291 e 1. 10.65 0.394 h 0.25 0.75 0.010 ...

Page 16

ETC5064 - ETC5064-X - ETC5067 - ETC5067-X mm DIM. MIN. TYP. MAX. A 9.78 10.03 0.385 B 8.89 9.04 0.350 D 4.2 4.57 0.165 d1 2.54 d2 0.56 E 7.37 8.38 0.290 e 1.27 F 0.38 G 0.101 M 1.27 ...

Page 17

DIM. MIN. TYP. MAX. MIN. a1 0.254 0.010 B 1.39 1.65 0.055 b 0.45 b1 0.25 D 25.4 E 8.5 e 2.54 e3 22.86 F 7.1 I 3.93 L 3.3 Z 1.34 ETC5064 - ETC5064-X - ETC5067 - ETC5067-X ...

Page 18

ETC5064 - ETC5064-X - ETC5067 - ETC5067-X Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the conse- quences of use of such information nor for any infringement of patents or other rights of ...

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