LTC3722-1 LINER [Linear Technology], LTC3722-1 Datasheet - Page 15

• Manufacturer Part Number: LTC3722-1
• Description: Synchronous Dual Mode Phase Modulated Full Bridge Controllers
• Manufacturer: LINER [Linear Technology]

OPERATIO
Fixed Delay Mode
The LTC3722-1/LTC3722-2 provides the flexibility through
the SBUS pin to disable the DirectSense delay circuitry and
enable fixed ZVS delays. The level of fixed ZVS delay is
proportional to the voltage programmed through the volt-
age divider on the PDLY and ADLY pins. See Figure 3 for
more detail.
Programming Adaptive Delay Time-Out
The LTC3722-1/LTC3722-2 controllers include a feature
to program the maximum time delay before a bridge
switch turn on command is summoned. This function will
come into play if there is not enough energy to commutate
a bridge leg to the opposite supply rail, therefore bypass-
ing the adaptive delay circuitry. The time delay can be set
with an external resistor connected between DPRG and
V
DPRG is 2V. The external resistor programs a current
which flows into DPRG. The delay can be adjusted from
approximately 35ns to 300ns, depending on the resistor
value. If DPRG is left open, the delay time is approximately
400ns. The amount of delay can also be modulated based
on an external current source that feeds current into
DPRG. Care must be taken to limit the current fed into
DPRG to 350 A or less.
REF
R
DPRG
( see Figure 4). The nominal regulated voltage on
DPRG
V
REF
Figure 3. Setup for Fixed ZVS Delays
Figure 4. Delay Timeout Circuitry
V
+
–
U
2V
SBUS
PDLY
ADLY
V
REF
SBUS
+
–
3722 F03
R1
R2
R3
TURN-ON
OUTPUT
3722 F04
Powering the LTC3722-1/LTC3722-2
The LTC3722-1/LTC3722-2 utilize an integrated V
regulator to serve the dual purposes of limiting the voltage
applied to V
voltage is sufficient to begin switching operation (under
voltage lockout). With its typical 10.2V turn-on voltage
and 4.2V UVLO hysteresis, the LTC3722-1/LTC3722-2 is
tolerant of loosely regulated input sources such as an
auxiliary transformer winding. The V
sinking up to 25mA of externally applied current. The
UVLO turn-on and turn-off thresholds are derived from an
internally trimmed reference making them extremely ac-
curate. In addition, the LTC3722-1/LTC3722-2 exhibits
very low (145 A typ) start-up current that allows the use
of 1/8W to 1/4W trickle charge start-up resistors.
The trickle charge resistor should be selected as follows:
Adding a small safety margin and choosing standard
values yields:
APPLICATION
DC/DC
Off-Line
PFC Preregulator
V
ceramic capacitor to decouple the fast transient currents
demanded by the output drivers and a bulk tantalum or
electrolytic capacitor to hold up the V
bootstrap winding, or an auxiliary regulator circuit takes
over.
Regulated bias supplies as low as 7V can be utilized to
provide bias to the LTC3722-1/LTC3722-2. Refer to
Figure 5 for various bias supply configurations.
CC
R
C
(minimum UVLO hysteresis)
HOLDUP
START(MAX)
should be bypassed with a 0.1 F to 1 F multilayer
12V 10%
V
CC
1.5k
= (I
LTC3722-1/LTC3722-2
CC
CC
as well as signaling that the chip’s bias
Figure 5. Bias Configurations
= V
1N5226
3V
+ I
0.1 F
IN(MIN)
DRIVE
85V to 270V
V
36V to 72V
) • t
– 10.7V/250 A
IN
V
390V
BIAS
RANGE
V
DELAY
< V
CC
DC
1N914
UVLO
RMS
/3.8V
CC
V
IN
CC
R
shunt is capable of
START
0.1 F
supply before the
+
R
1.4M
100k
430k
START
C
3722 F04
HOLD
CC
15
shunt
372212i